SL1680用户指南

Introduction介绍

The Astra Machina Foundation Series of evaluation-ready kits enable easy and rapid prototyping for the Synaptics SL-Series of multi-modal embedded processors. A modular design incorporates swappable core compute modules, a common I/O board, and daughter cards for connectivity, debug, and flexible I/O options.
Astra Machina Foundation系列评估套件 使Synaptics SL系列多模式嵌入式处理器能够轻松快速地进行原型设计。 模块化设计包含可更换的核心计算模块、通用I/O板和子卡,用于连接、调试和灵活的I/O选项。

The Synaptics Astra SL-Series is a family of highly integrated AI-native Linux and Android SoCs optimized for multi-modal consumer, enterprise, and industrial IoT workloads with hardware accelerators for edge inferencing, security, graphics, vision, and audio. The SL1680 incorporates high-performance compute engines, including a quad-core Arm® Cortex®-A73 64-bit CPU subsystem, a multi-TOPS NPU, a high-efficiency, feature-rich GPU for advanced graphics and AI acceleration, and multimedia accelerators for image signal processing (ISP), 4K video encode/decode, and audio. The SL1680 SoC brings a combination of performance and feature integration to device manufacturers, enabling multi-modal applications that can meet price points across various IoT market segments.
Synaptics Astra SL系列是 一个高度集成的人工智能原生Linux和Android SoC系列,针对多模式消费者、企业和工业物联网的工作负载进行了优化,具有边缘推理、安全、图形、视觉和音频的硬件加速器。 SL1680集成了高性能计算引擎,包括四核Arm®Cortex®-A73 64位CPU子系统、multi-TOPS NPU、用于高级图形和AI加速的高效且功能丰富的GPU,以及用于图像信号处理(ISP)、4K视频编码/解码和音频的多媒体加速器。 SL1680 SoC为设备制造商带来了性能和功能集成的结合,赋能可满足各种物联网细分市场价位的多模式应用。

Scope范围

This user guide describes the hardware configuration and functional details for the Astra Machina SL1680 core module, I/O card, and supported daughter cards, in addition to the bring-up sequence for the evaluation kit.
本用户指南介绍了 Astra Machina SL1680核心模块、I/O卡和支持的子卡的硬件配置和功能细节,以及评估套件的点亮顺序。

Definition of Board Components板卡组件定义

  • Astra Machina: Combined system with core module, I/O board, and supported daughter cards
    Astra Machina: 由核心模块、I/O板和支持的子卡构成的组合系统。

  • Core module: Processor subsystem module with key components including SL1680, eMMC, and LPDDR4x.
    核心模块: 处理器子系统模块,包括SL1680、eMMC和LPDDR4x等关键组件。

  • I/O board: Common base board that includes various standard hardware interfaces, buttons, headers, and power-in.
    I/O板: 通用基板,包括各种标准硬件接口、按钮、接头和电源输入。

  • Daughter card: Add-on boards for supporting various features such as connectivity, debug, and other flexible I/O options.
    子卡: 用于支持各种功能的附加板,如连接、调试和其他灵活的I/O选项。

Astra Machina System OverviewAstra Machina系统概述

This section covers system features, block diagrams and top views of the Astra Machina evaluation kit.
本节介绍 Astra Machina评估套件的系统功能、框图和俯视图。

../_images/image52.png

SL1680 core module (Dimensions: WxH = 69.6 x 47.38mm)


SL1680核心模块(尺寸:宽x高= 69.6 x 47.38mm)

../_images/image62.png

I/O board


I/O板

Features特征

The SL1680-based evaluation system includes the following components:
基于SL 1680的评估系统包括以下组件:

  • Main components on the core module:核心模块的主要组件:

    • Synaptics SL1680 Quad-Core Arm Cortex-A73 embedded IoT processor, up to 2.1 GHz
      Synaptics SL1680四核ARM Cortex—A73 嵌入式物联网处理器,高达2.1 GHz。

    • Storage: eMMC 5.1 (16 GB)存储:eMMC 5.1(16 GB)

    • DRAM: up to x64 4 GB system memory by 2pcs x32 16 Gbit LPDDR4x
      DRAM:使用2颗 x32 16 Gbit LPDDR4x,最高可达 x64 4 GB系统内存。

    • PMIC: two support DVFS in Vcore and Vcpu supply rails
      PMIC:两个,支持Vcore和Vcpu供电轨中的DVFS。

    • HDMI Micro Rx interface: V2.1 with HDCP 2.2 sinks up to 4K60p video and advanced audio
      HDMI Micro Rx接口: V2.1与HDCP 2.2可接收高达4K60p的视频和高级音频。

    • SD Card ReceptacleSD卡插座。

  • Main components on the I/O board:I/O板上的主要组件:

    • HDMI Type-A Tx interface: V2.1 with HDCP 2.2 sources up to 4K60p video and advanced audio
      HDMI Type—A Tx接口:V2.1,支持HDCP 2.2信号源,最高可达4K60p 视频和高级音频。

    • M.2 E-key 2230 Receptacle: It supports SDIO, PCIe, UART for Wi-Fi/BT modules
      M.2 E-key 2230插座: 支持用于Wi—Fi/BT模块的SDIO、PCIe、UART。

    • USB 3.0 Type-A: 4 ports to supports host mode at SuperSpeed.
      USB 3.0 Type-A:4个端口,支持SuperSpeed主机模式。

    • USB 2.0 Type-C: supports OTG host or peripheral mode at Hi-Speed.
      USB 2.0 Type-C:支持高速OTG主机或外设模式。

    • Push buttons: used for USB-BOOT selection and system RESET.
      按钮:用于USB-BOOT选择和系统重启。

    • 2pin Header: used for SD-BOOT selection.两针接头:用于SD—BOOT选择。

  • Daughter card interface options:子卡接口选项:

    • MIPI DSI on 22-pin FPC interface to support 4-lane DSI plus I2C and GPIOs for up to 4K30p/2K60p display panel.
      MIPI DSI 在22针FPC接口上, 支持4-lane DSI加I2C和GPIO,用于最高4K30p/2K60p的显示面板。

    • MIPI CSI-2 on two FPC interfaces. 22-pin at CSI0 for 4-lane, 15pin at CSI1 for 2-lane. Each plus I2C and GPIOs, for up to 4K60p (one camera) or 4K30p (two cameras)
      MIPI CSI-2 在两个FPC接口上, CSI0处的22针用于4-lane,CSI1处的15针用于2-lane。每个加上I2C和GPIO,适用于高达4K60p(一个摄像头)或4K30p(两个摄像头)。

    • JTAG daughter card for debug.调试用的JTAG子卡。

    • 40-pin header for additional functions40-针接头用于附加功能。

    • 4-pin PoE+ daughter card to support an add-on voltage regulator module for PoE+ Type2 (802.3at) power device. Available power shall be 25.5W (Class 4) at 5Vpins of 40-pin header to I/O board.
      4针 PoE+ 子卡, 支持 PoE+Type2(802.3at)电源设备的附加电压调节器模块。在40针接头到I/O板的5V引脚处,可用功率应为25.5W(4级)。

    • 4-pin connector for active Fan with PWM.PWM有源风扇的4针接头。

    • Type-C power supply with 15V @ 1.8A.Type-C电源,15V@1.8A。

SL1680 system block diagramSL1680系统框图

../_images/image7.svg

SL1680 system block diagram


SL1680系统框图

Top view of SL1680 Astra Machina Evaluation SystemSL1680 Astra Machina评估系统的俯视图

../_images/image82.png

Top view of SL1680 evaluation system


SL1680评估系统俯视图

System connectors系统连接器

../_images/image92.png

Front view


前视图

../_images/image102.png

Rear view


后视图

Astra Machina Board Control/Status & System I/OAstra Machina板 控制/状态&系统I/O

This section covers boot-up, LEDs status indicators, buttons, connectors, and pin-strap settings.
本节介绍启动、LED状态指示灯、按钮、 连接器和pin-strap设置。

Booting Up启动

The Astra Machina supports booting from three interfaces. Users can select a boot interface before powering up, as follows: -
Astra Machina支持三种启动接口。 上电前用户可选一种,如下所示:-

  • eMMC boot: Default boot interface
    eMMC启动:默认启动接口

  • SD boot: Short SD_Boot header by 2.54mm jumper-cap before power-up, see SD_Boot header in Locations of jumper on I/O board. Ensure SD-Card with firmware is plugged into SD-slot on core module in Locations on core module bottom side.
    SD启动: 通电前用2.54mm跳线帽短接SD_Boot接头,请参阅 I/O板的跳线位置 中的SD_Boot接头。 确保烧好固件的SD卡已插入核心模块上的SD插槽中,请参阅 核心模块背面位置图

  • USB boot: Connect USB-C usb2.0 port to the host PC, then follow the procedure in section 2.5.
    USB启动:将USB-C usb2.0端口连接到主机PC,然后按照 第2.5节中的步骤操作。

LEDsLED指示灯

LED locationsLED指示灯的位置

LED locations on I/O board shows the LED locations on the I/O board.
I/O板的LED位置图 显示I/O板上的LED位置。

../_images/image112.png

LED locations on I/O board


I/O板的LED位置图

LED definitionsLED定义

LED definitions on I/O boardI/O板上的LED定义

LED

Color颜色

LEDs FunctionLED功能

D10

Green绿色

LED indicator for USB3.0 Hub is working in normal mode or suspend mode.
LED指示灯用于标识USB3.0 Hub当前工作在正常模式下还是挂起模式下。

D17

Green绿色

LED indicator1 for M.2 device general purpose.
LED指示灯1用于标识M.2设备的通用用途。

D18

Green绿色

LED indicator2 for M.2 device general purpose.
LED指示灯2用于标识M.2设备的通用用途。

D37

Green绿色

LED indicator for USB-C PD power source status.
LED指示灯用于标识USB-C PD电源的状态。

D40

RED红色

LED indicator for Stand-By Status.LED指示灯用于标识待机状态。

SM PinStrap and Boot-up SettingsSM PinStrap和启动设置

SM pinstrap and boot-up settings on core module
核心模块上的SM Pinstrap和启动设置

Pad NamePad名称

Strap NameStrap名称

Setting Value配置值

Default*缺省*

Resistor Stuffing电阻装配

stuffed+装配

removed-移除

Description描述

Rpu = OnChip Pull-upRpu =片内上拉

Rpd = OnChip Pull-downRpd =片内下拉

SM_URT0_TXD

SM_STRP[0]

SM to SoC RSTn mode select (Rpd)SM到SoC RSTn模式选择(Rpd)

0*0*

-R188

0: socRstN releasing waits for SoCRstCnt but does not wait for SM_PWR_OK (mode_0 of SM_URT0_TXD, system will assert this signal when SoC core power is ready).
0:socRstN释放,等待SoCRstCnt,但不等待SM_PWR_OK(SM_URT0_TXD的mode_0,当SoC的Core电源就绪时,系统将发出此信号)。

1

+R188

1: socRstN releasing waits for both SoCRstCnt and SM_PWR_OK.
1:socRstN释放,同时等待SoCRstCnt和SM_PWR_OK。

SM_SPI2_SDO

SM_STRP[1]

Straps for software usage (Rpd)软件用的Straps(Rpd)

0*0*

-R190

1

+R190

SM_SPI2_SS0n

SM_STRP[2]

Straps for software usage (Rpd)软件用的Straps(Rpd)

0*0*

-R192

1

+R192

SM_SPI2_SS1n

SM_STRP[3]

Straps for software usage (Rpd)软件用的Straps(Rpd)

0*0*

-R194

1

+R194

SM_TEST_EN

SM_TEST_EN

SM TEST Enable (Rpd)SM TEST使能(Rpd)

0*0*

-R184

0: Enable ARM ICE JTAG connections (CoreSight)
0:使能ARM ICE JTAG连接(CoreSight)

1

+R184

1: Enable SCAN or BSCAN tests1:使能SCAN或BSCAN测试

SM_JTAG_SEL

SM_JTAG_SEL

SM JTAG Port Selection (Rpd)SM JTAG端口选择(Rpd)

0*0*

-R186

0: ARM ICE JTAG connections0:ARM ICE JTAG连接

1

+R186+ R186

1: Reserved for factory use1:为工厂预留

SM_POR_EN

SM_POR_EN

Power-on reset (POR) bypass (Rpu)上电复位(POR)旁路(Rpu)

0

+R3

0: Bypass on-chip POR generator0:旁路片内POR发生器

1*1*

-R3

1: Enable on-chip POR generator1:使能片内POR发生器

SoC PinStrap and Boot-up SettingsSoC PinStrap和启动设置

SoC pinstrap and boot-up settings on core module
核心模块上的SoC pinstrap和启动设置

Pad NamePad名称

Strap NameStrap名称

Setting Value配置值

Default*缺省*

Resistor Stuffing电阻装配

stuffed+装配

removed-移除

Description描述

Rpu = OnChip Pull-upRpu =片内上拉

Rpd = OnChip Pull-downRpd =片内下拉

RGMII_TXD[2]RGMII_TXD[2]

cpuRstBypscpuRstByps

CPU reset bypass strap (Rpd)CPU复位旁路strap(Rpd)

0*0*

-R178

0: Enable reset logic inside CPU partition
0:使能CPU分区内的复位逻辑

1

+R178

1: Bypass reset logic inside CPU partition
1:旁路CPU分区内的复位逻辑

RGMII_TXD[3]

pllPwrDown

SYS/MEM/CPU PLL Power Down;

Note: pllPwrDown should be set to 1 only when pllByps is also set to 1. (Rpd)


PLL/MEM/CPU 下电;

注意:只有当pllByps也设置为1时,pllPwrDown才应设置为1。(Rpd)

0*0*

-R180

0: Power up0:上电

1

+R180

1: Power down1:下电

RGMII_TXCTL

pllBypspllByps

SYS/MEM/CPU PLL bypass indicatorPLL/MEM/CPU PLL旁路标识

0*0*

-R182

0: No bypass0:无旁路

1

+R182

1: All PLL bypassed1:旁路所有PLL

SPI1_SS0n

software_strap[1]

Straps for software usage (Rpd)软件用的Straps(Rpd)

0*0*

-R174—R174

1

+R174

RGMII_TXD[0]RGMII_TXD [0]

software_strap[2]software_strap [2]

Straps for software usage (Rpd)软件用的Straps(Rpd)

0*0*

-R172

1

+R172+ R172

RGMII_TXD[1]

software_strap[3]

Straps for software usage (Rpd)软件用的Straps(Rpd)

0*0*

-R170

1

+R170

SPDIFO

boot_src[1]boot_src[1]

CPU Boot Source bit [1] (Rpu)

See boot_src [1:0]


CPU boot源 位[1](Rpu)

参见boot_src [1:0]

0

ROM boot from SPI.从SPI启动ROM boot。

1*1*

ROM boot from eMMC.从eMMC启动ROM boot。

RGMII_TXC

Legacy_bootLegacy_boot

Strap to reduce reset wait time (Rpd)减少复位等待时间的Strap(Rpd)

0*0*

-R176—R176

0: 2 ms0:2毫秒

1

+R176

1: 20 ms1:20毫秒

Boot-up settings on I/O boardI/O板上的启动设置

Net NameNet名称

Strap NameStrap名称

Setting Value配置值

Default*缺省*

Resistor Stuffing电阻装配

stuffed+装配

removed-移除

Description描述

Rpu = OnChip Pull-upRpu = 片内上拉

Rpd = OnChip Pull-downRpd = 片内下拉

USB_BOOTnUSB_BOOTn

USB-BootUSB-Boot

ROM code uses this strap to determine if booting from USB or not (Rpu)
ROM代码使用此strap来确定是否从USB启动(Rpu)。

0

0: Boot from USB when USB-BOOT button is pressed while system reset de-assertion.
0:在系统复位de-assertion时,当USB—BOOT按钮被按下,从USB启动。

1*1*

1: Boot from the device select by boot_src[1]
1:从boot_src[1]选择的设备启动。

CONN-SPI.VDDIO1P8.BOOT_SRC1CONN-SPI.VDDIO1P8.BOOT_SRC1

SD-BootSD—Boot

ROM code uses this strap to determine if booting from SD_Card or not (Rpu)
ROM代码使用此Strap来确定是否从SD_Card启动(Rpu)。

0

0: Boot from SD_Card when SD_Boot header is on while system reset de-assertion.
0:在系统复位de-assertion时,当SD_Boot接头连上,从SD_Card启动。

1*1*

1: Boot from the device select by boot_src[1] when SD_Boot Header is off.
1:当SD_Boot接头断开,从boot_src[1]选择的设备启动。

Hardware Manual Button Settings硬件手动按钮设置

Hardware manual button settings definitions on I/O board
I/O板上的硬件手动按钮设置定义

Switch BlockSwitch Block

Type类型

Setting配置

Function功能

SW6 (RESET)SW6(RESET)

Momentary Pushbutton瞬时按钮

Push按压

SL1680 Reset Key assertedSL1680复位键被激活

Release松开

Key de-asserted按键被取消

SW7(USB_BOOT)SW7(USB_BOOT)

Momentary Pushbutton瞬时按钮

Push按压

USB boot Key asserted. Needs combo RESET button. Read below steps on how to enter USB-Boot mode.
USB启动按键被激活。 需要组合RESET按钮。请阅读以下步骤,了解如何进入USB-boot模式。

Release松开

Key de-asserted按键被取消

To enter USB-Boot mode, follow these steps:
要进入USB-boot模式, 请执行以下步骤:

Note注意

Prior to these steps, make sure the USB driver is installed successfully on the PC host side. For details, please reference Astra Yocto Linux User Guide.
在执行这些步骤之前, 请确保USB驱动已成功安装在PC主机端。 详情请参阅 Astra Yocto Linux用户指南

  1. Push RESET button to assert system reset to SL1680.
    按下RESET按钮, 向SL1680发出系统复位信号。

  2. Keep pushing RESET button and push USB_BOOT button at the same time for 1-2 seconds.
    保持按住RESET按键, 同时按下USB_BOOT按键,保持1—2秒。

  3. Release RESET button while holding USB_BOOT button, so SL1680 enters USB-Boot mode.
    在按住USB_BOOT按键的同时松开RESET按键, 使SL1680进入USB启动模式。

  4. Check and wait for the console print… messages.
    检查并等待Console打印.消息。

    Once the console print is returned and entered USB boot successfully, release USB_BOOT button.
    当Console打印返回成功进入USB boot后, 即可松开USB_boot按钮。

../_images/image122.png

Locations of manual buttons on I/O board


I/O板上手动按钮的位置图

Hardware Jumper Settings硬件跳线设置

Hardware jumper settings definitions on I/O board
I/O板上的硬件跳线设置定义

Ref Des

Type类型

PinPin

Connection连接

Description描述

JP1

2x1 2.54mm header2x1 2.54mm接头

1-2

SD_Boot selectionSD_Boot 选择

  • Open: Boot from the device select by boot_src[1]


  • 断开:从boot_src[1]选择的设备启动。

  • Short: Boot from SD_Card while power-up or system reset de-assertion


  • 短路:在上电或系统复位信号de-assertion时,从SD卡启动。

To enter SD-Boot mode, follow these steps:
要进入SD-Boot模式,请执行以下步骤:

Note注意

Prior to these steps, make sure SD-Card with firmware is plugged into SD-slot on the core module.
在执行这些步骤之前, 请确保烧好固件的SD卡被插在核心模块的SD插槽上。

  1. Short SD_Boot header by 2.54mm jumper-cap before power-up.
    上电前请用2.54毫米跳线帽短接SD_boot接头。

  2. Power-up system, then boot-up from SD_Card.
    系统上电,然后从SD卡启动。

Locations of jumper on I/O board shows the Header locations on the I/O board.
I/O板上跳线的位置图 显示了I/O板的接头位置。

../_images/image132.png

Locations of jumper on I/O board


I/O板上跳线的位置图

SL1680 Evaluation System ConnectorsSL1680评估系统连接器

Locations of core module connectors on top side核心模块正面的连接器位置

../_images/image14.svg

Locations on core module top side


核心模块正面位置图

Locations of core module connectors on bottom side核心模块背面的连接器位置

../_images/image15.svg

Locations on core module bottom side


核心模块背面位置图

Core module connector definitions核心模块连接器定义

Core module connector definitions核心模块连接器定义

Main主要

Connecting Boards/Devices (Ref Des if any)
连接的板卡/设备 (Ref Des,如有)

Functions功能

Remarks注释

Ref Des

J205J205

HDMI SinkHDMI Sink

HDMI_Rx

For off-board HDMI source host connection.
用于板外HDMI源主机的连接。

J16

MicroSD CardMicroSD卡

SDIO cardSDIO卡

For micro-SD type of memory card extension.
用于micro-SD类型的存储卡扩展。

Locations of I/O board connectors on top sideI/O板正面的连接器位置

../_images/image161.png

Locations on I/O board top side


I/O板正面的位置图

Locations of I/O board connectors on bottom sideI/O板背面的连接器位置

../_images/image171.svg

Locations on I/O board bottom side


I/O板背面的位置图

I/O board connector definitionsI/O板连接器定义

I/O board connector definitionsI/O板连接器定义

Main主要

Connecting Boards/Devices (Ref Des if any)
连接的板卡/设备 (Ref Des(如有)

Functions功能

Remarks注释

Ref Des

J1

ISP D/C

SPI

12-pin daughter card to support offline program SPI NOR flash on core module
12针子卡, 用于支持核心模块上离线编程的SPI NOR闪存。

J2

RJ45 cableRJ45电缆

Giga Ethernet千兆以太网

For Wired Ethernet connection用于有线以太网连接。

J12

HDMI SinkHDMI Sink

HDMI TX

For off-board HDMI Sink device connection
用于板外HDMI Sink设备连接。

J13

FAN风扇

Heat Dissipation w/ FAN散热器w/ 风扇

Active FAN with PWMPWM有源风扇。

J17

M.2 2230 D/C

SDIO and PCIeSDIO和PCIe

1x1/2x2 WiFi/Bluetooth card via SDIO or PCIe
通过SDIO或PCIe连接的1x1/2x2 WiFi/蓝牙卡。

J22

Debug Board调试板

JTAG

XDB debugger for debugging调试用的XDB调试器。

J32

40-pins Header40针接头

Uart,I2C,SPI,PDM,I2SI/O, GPIOs,STS1,PWM,ADC
UART、I2C、SPI、PDM、I2SI/O、GPIO、STS1、PWM、ADC

Flexible for support various D/C灵活支持各种D/C。

J34

PoE+ D/CPoE + D/C

PoE+Poe +

4-pin PoE+ daughter card with supporting an add-on 5V voltage to 40pin Header.
4针PoE+子卡,支持向40针接头附加5V电压。

J206J206

MIPI-CSI0 adaptorMIPI-CSI0 适配器

MIPI-CSIMIPI—CSI

For MIPI-CSI x4 lane extension, like camera
用于MIPI-CSI x4 lane扩展,如摄像头。

J207J207

MIPI-CSI1 adaptorMIPI-CSI1 适配器

MIPI-CSI

For MIPI-CSI x2 lane extension, like camera
用于MIPI-CSI x2 lane扩展,如摄像头。

J208J208

MIPI-DSI adaptorMIPI-DSI 适配器

MIPI-DSIMIPI—DSI

For MIPI-DSI x4 lane extension, like panel
用于MIPI—DSI x4 lane扩展,如面板。

J210

USB DeviceUSB 设备

USB 3.0 x2

For USB3.0 extension in Device mode only仅适用于设备模式下的USB3.0扩展。

J213

TypeC power sourceTypeC 电源

Power Supply电源

Power for Astra Machina rated at 15V/1.8AAstra Machina的额定功率为 15V/1.8A。

J215J215

USB DeviceUSB 设备

USB2.0 OTG

For USB2.0 extension, in either Host or Device mode
用于在主机或设备模式下的USB2.0扩展。

J216

USB DeviceUSB 设备

USB 3.0 x2

For USB3.0 extension in Device mode only仅用于设备模式下的USB3.0扩展。

Daughter Cards子卡

A set of daughter cards supplements the Astra Machina system with a range of extensible and configurable functionalities including Wi-Fi and Bluetooth connectivity, debug options and general purpose I/O. Details of currently supported daughter cards are described in this section.
为Astra Machina系统提供一系列可扩展和可配置功能的一套子卡, 包括Wi-Fi和蓝牙连接、调试选项和通用I/O。本节介绍了当前已支持子卡的详细信息。

Debug Board调试板

Debug Board (Rev5) allows users to communicate with the SL1680 system over JTAG through a Debugger on a PC host. While connecting the Astra Machina and debug board with a 20-pin flat cable, align pin-1 of the 2x10 cable socket at the debug board side with pin-1 of 2x6 header J22 on the evaluation system.
调试板(Rev5)允许用户在PC主机上通过JTAG使用调试器与SL1680系统通信。 使用20针扁平电缆连接Astra Machina和调试板时,请将调试板侧2x10电缆插座的引脚1与评估系统上2x6接头J22的引脚1对齐。

Users may communicate with SL1680 over UART on a PC host by using a UART to USB cable commonly available. See the Astra Machina webpage for a list of qualified parts. As an option, the debug board also provides such bridging function based on the Silicon Labs CP2102. A virtual COM port driver is required, and can be downloaded from the vendor website and installed on the host PC.
用户可以使用UART转USB的通用电缆, 通过PC主机上的UART与SL1680进行通信。关于可用零部件清单,请参阅Astra Machina网页。 作为备选,调试板也提供了基于Silicon Labs CP2102的桥接功能。 所需的虚拟COM端口驱动程序,可从 供应商网站 下载并安装在主机上。

UART on the evaluation system and the PC host USB are digitally isolated, with no direct conductive path, eliminating ground loop and back-drive issues when either is powered down.
评估系统上的UART和PC主机的USB是数字隔离的, 无直接导电路径,消除了下电时的接地回路和back-drive问题。

Debug board connectivity for UART and JTAG shows debug board connectivity facilitating UART and JTAG communications.
调试板的UART及JTAG连接 显示了调试板上UART及JTAG通信的便利连接。

../_images/image181.png

Debug board connectivity for UART and JTAG


调试板的UART及JTAG连接

M.2 CardM.2卡

An M.2 E-Key socket J17 is provided for a variety of modules in the M.2 form factor. Typical applicable modules support Wi-Fi/BT devices with SDIO or PCIE signal interfaces.
M.2 E—Key插座J17用于M.2 form factor的各种模块。 典型应用模块支持具有SDIO或PCIE信号接口的Wi-Fi/BT设备。

Available modules:可用模块:

  • Ampak AP12275_M2P with SYN43752 2x2 WiFi6/BT5.3 2x2 over PCIE on M.2 adaptor
    Ampak AP12275_M2P with SYN43752 2x2 WiFi6/BT5.3 2x2 over PCIE on M.2 adaptor

  • Ampak AP12276_M2P with SYN43756 2x2 WiFi6E/BT5.3 2x2 over PCIE on M.2 adaptor
    Ampak AP12276_M2P with SYN43756 2x2 WiFi6E/BT5.3 2x2 over PCIE on M.2 adaptor

260-Pins SODIMM Definition260针SODIMM定义

A 260-Pins SODIMM connector (PN: TE_2309413-1) joins the core module and the I/O board. Table in below shows the assignment for the 260-Pins.
260针SODIMM连接器(PN:TE_2309413-1)连接核心模块和I/O板。 下表显示了260针的分配。

260-Pins SODIMM definition260针SODIMM定义

Assignment分配

Pin#Pin#

260-Pins SODIMM260针 SOdimm

Pin#Pin#

Assignment分配

VDDM_LPQ_control (From IO_Exp)VDDM_LPQ_control(来自IO_Exp)

2

1

N.A

SPI1_SDO (USB_BOOTn)SPI1_SDO(USB_BOOTn)

4

3

N.A

SPI1_SCLK

6

5

N.A

VDDM_control (From IO_Exp)VDDM_control(来自IO_Exp)

8

7

N.A

HDMI_RX.V3P3.CEC

10

9

N.A

SPI1_SDI

12

11

N.A

SPI1_SS0n

14

13

N.A

External_Boot_SRC0

16

15

N.A

N.A

18

17

N.A

N.A

20

19

N.A

N.A

22

21

N.A

N.A

24

23

N.A

GND

26

25

N.A

MIPI_CSI1_RD0p

28

27

N.A

MIPI_CSI1_RD0n

30

29

N.A

GND

32

31

N.A

MIPI_CSI1_RD1n

34

33

N.A

MIPI_CSI1_RD1p

36

35

N.A

GND

38

37

N.A

MIPI_CSI1_RCKp

40

39

N.A

MIPI_CSI1_RCKn

42

41

N.A

GND

44

43

N.A

USB2_Dn

46

45

N.A

USB2_Dp

48

47

N.A

GND

50

49

N.A

USB3_RXp

52

51

N.A

USB3_RXn

54

53

GND

GND

56

55

MIPI_CSI0_RD2n

USB3_TXp

58

57

MIPI_CSI0_RD2p

USB3_TXn

60

59

GND

GND

62

61

MIPI_CSI0_RD3n

USB3_USB20.Dp

64

63

MIPI_CSI0_RD3p

USB3_USB20.Dn

66

65

GND

GND

68

67

MIPI_CSI0_RD1p

USB2_IDPIN

70

69

MIPI_CSI0_RD1n

PWR_OTG_VBUS

72

71

GND

PWR_USB3_VBUS

74

73

MIPI_CSI0_RD0n

I2S3_BCLK

76

75

MIPI_CSI0_RD0p

I2S3_DI

78

77

GND

I2S3_DO

80

79

MIPI_CSI0_RCKp

2S3_LRCK

82

81

MIPI_CSI0_RCKn

I2S2_DI[0]I2S2_DI[0]

84

83

GND

PDM_DI0

86

85

PCIe_RX1p

PDM_DI1

88

87

PCIe_RX1n

PDM_CLKO

90

89

GND

I2S2_BCLK

92

91

PCIe_TX1n

I2S2_LRCK

94

93

PCIe_TX1p

GPIO10GPIO10

96

95

GND

FAN_TACH_ControlFAN_TACH_Control

98

97

PCIe_RX0p

SPDIFO

100

99

PCIe_RX0n

FAN_PWM

102

101

GND

I2S1_BCLK

104

103

PCIe_TX0n

EXPANDER_INT-REQnEXPANDER_INT-REQn

106

105

PCIe_TX0p

BOOT_SRC1

108

107

GND

I2S1_DO0

110

109

PCIe_CLKp

I2S1_MCLK

112

111

PCIe_CLKn

I2S1_LRCK

114

113

GND

ADCI[0]ADCI[0]

116

115

MIPI_DSI_TD0n

ADCI[1]ADCI[1]

118

117

MIPI_DSI_TD0p

URT0_TXD

120

119

GND

URT0_RXD

122

121

MIPI_DSI_TD1n

SPI2_SDI

124

123

MIPI_DSI_TD1p

SPI2_SCLK

126

125

GND

SPI2_SDO

128

127

MIPI_DSI_TCKp

SPI2_SS3n

130

129

MIPI_DSI_TCKn

USB2_OCn

132

131

GND

SPI2_SS1n

134

133

MIPI_DSI_TD3n

SPI2_SS0n

136

135

MIPI_DSI_TD3p

SM_TW3_SDA

138

137

GND

SM_TW3_SCL

140

139

MIPI_DSI_TD2p

N.A

142

141

MIPI_DSI_TD2n

N.A

144

143

GND

N.A

146

145

GND

N.A

148

147

HDMI_TX_TCKn

N.A

150

149

HDMI_TX_TCKp

HDMITX_HPD

152

151

GND

USB-C_Logic_INTnUSB-C_Logic_INTn

154

153

HDMI_TX_TD0n

HDMI_TX_EDDC_SDA

156

155

HDMI_TX_TD0p

HDMI_TX_EDDC_SCL

158

157

GND

Levershift_EN# for 40P headerLevershift_EN# 用于40P接头

160

159

HDMI_TX_TD1n

SM_HDMI_CEC

162

161

HDMI_TX_TD1p

RSTIn@PU

164

163

GND

JTAG_TDO

166

165

HDMI_TX_TD2n

JTAG_TDI.SoC_WakeUp#JTAG_TDI.SoC_WakeUp#

168

167

HDMI_TX_TD2p

JTAG_TMS

170

169

GND

N.A

172

171

HDMITX-eARC_RXn

N.A

174

173

HDMITX-eARC_RXpHDMITX—eARC_RXp

GPIO39

176

175

GND

TW2B_SDA

178

177

HDMI_TX_PWR_EN

TW2B_SCL

180

179

JTAG_TCK

TW0_SDA

182

181

GPIO38

TW0_SCL

184

183

JTAG_TRSTn

URT3_CTSn for M.2URT3_CTSn 用于M.2

186

185

GPIO36

URT3_RTSn for M.2URT3_RTSn 用于M.2

188

187

URT3_RXD for M.2URT3_RXD 用于M.2

PWM1

190

189

GPIO37

GND

192

191

URT3_TXD for M.2URT3_TXD 用于M.2

PWR_1V8

194

193

N.A

PWR_1V8

196

195

N.A

PWR_1V8_CTL

198

197

N.A

PWR_1V8_CTL

200

199

N.A

PWR_3V3_CTL

202

201

TW1B_SCL

PWR_3V3_CTL

204

203

TW1B_SDA

GND

206

205

USB_BOOTnUSB_BOOTn

M.2_WIFI_SDIO_CLK

208

207

Vcore/Vcpu control (From IO_Exp)Vcore/Vcpu 控制(来自IO_Exp)

GND

210

209

GePHY_LED1&&STRP[CFG_LDO0]PHY_LED 1&&STRP [CFG_LDO0]

M.2_WIFI_SDIO_CMD

212

211

GePHY_LED2&&STRP[CFG_LDO1]PHY_LED 2&&STRP [CFG_LDO1]

GND

214

213

GND

M.2_WIFI_SDIO_D0

216

215

RJ45_MDIP0

GND

218

217

RJ45_MDIN0

M.2_WIFI_SDIO_D1

220

219

GND

GND

222

221

RJ45_MDIP1

M.2_WIFI_SDIO_D2

224

223

RJ45_MDIN1

GND

226

225

GND

M.2_WIFI_SDIO_D3

228

227

RJ45_MDIP2

GND

230

229

RJ45_MDIN2

PWR_3V3-M.2

232

231

GND

PWR_3V3-M.2

234

233

RJ45_MDIP3

PWR_3V3-M.2

236

235

RJ45_MDIN3

PWR_3V3

238

237

GND

PWR_3V3

240

239

N.A

PWR_3V3

242

241

N.A

GND

244

243

GND

GND

246

245

GND

GND

248

247

GND

GND

250

249

GND

PWR_5V

252

251

PWR_5V

PWR_5V

254

253

PWR_5V

PWR_5V

256

255

PWR_5V

PWR_5V

258

257

PWR_5V

PWR_5V

260

259

PWR_5V

40-Pin Header40针接头

A 40-pin GPIO header with 0.1-inch (2.54mm) pin pitch is on the top edge of the I/O board. Any of the general-purpose 3.3V pins can be configured in software with a variety of alternative functions. For more information, please refer to the SL1680 Datasheet.
40针GPIO接头, 引脚间距为0.1英寸(2.54mm),位于I/O板正面的边缘。 任何通用3.3V引脚的各种可选功能都可通过软件配置。 详情请参阅 SL1680 Datasheet

Note注意

Pin16/Pin18 are ADCI[0]/[1], the full-scale voltage is 1.2V @ max.
Pin16/Pin18为 ADCI[0]/[1],满量程电压为 1.2V@max。

../_images/image191.png

40-Pins header definition


40针接头定义

Pin-demuxing for Standard Interface Configuration标准接口配置的引脚解复用

This section covers pin-demuxing configuration for the SL1680 evaluation system .
本节介绍SL1680评估系统的引脚解复用配置。

For System Manager (SM), see SM Pin-demuxing usage.
对于System Manager(SM),请参阅 SM 引脚解复用用法

For System on Chip (SoC), see SoC Pin-demuxing usage.
对于片上系统(SoC),请参阅 SoC 引脚解复用用法

SM Pin-demuxing usageSM 引脚解复用用法

SL1680 System Manager (SM) DomainSL1680 System Manager(SM)Domain

Pad/Pin NamePad/Pin名称

Default Usage缺省用法

Direction方向

Mode Setting模式设置

SM_TWSI


SM_TWSI

SM_TW2_SCL

IO:RX_EDID_SCLIO:RX_EDID_SCL

OUTOUT

MODE_0MODE_0

SM_TW2_SDA

IO:RX_EDID_SDAIO:RX_EDID_SDA

IN/OUT

MODE_0MODE_0

SM_TW3_SCL

IO:SM_TW3_SCLIO:SM_TW3_SCL

OUTOUT

MODE_1MODE_1

SM_TW3_SDA

IO:SM_TW3_SDAIO:SM_TW3_SDA

IN/OUT

MODE_1MODE_1

SM_JTAG


SM_JTAG

SM_TMS

IO:SM_GPIO[6]IO:SM_GPIO[6]

IN/OUT

MODE_1MODE_1

SM_TDI

IO:SM_GPIO[7]IO:SM_GPIO[7]

ININ

MODE_1MODE_1

SM_TDO

IO:SM_GPO[8]IO:SM_GPO[8]

OUTOUT

MODE_1MODE_1

SM_UART0/1


SM_UART0/1

SM_URT0_TXD

O:SM_URT0_TXDO:SM_URT0_TXD

OUTOUT

MODE_0MODE_0

SM_URT0_RXD

I:SM_URT0_RXDI:SM_URT0_RXD

ININ

MODE_0MODE_0

SM_URT1_TXD

IO:SM_TW2B_SCLIO:SM_TW2B_SCL

OUTOUT

MODE_6MODE_6

SM_URT1_RXD

IO:SM_TW2B_SDAIO:SM_TW2B_SDA

IN/OUTIN/OUT

MODE_6MODE_6

SM_SPI2


SM_SPI2

SM_SPI2_SS0n

O:SM_SPI2_SS0nO:SM_SPI2_SS0n

OUTOUT

MODE_0MODE_0

SM_SPI2_SS1n

O:SM_SPI2_SS1nO:SM_SPI2_SS1n

OUTOUT

MODE_1MODE_1

SM_SPI2_SS2n

IO:SM_GPIO[15]IO:SM_GPIO[15]

ININ

MODE_2MODE_2

SM_SPI2_SS3n

O:SM_SPI2_SS3nO:SM_SPI2_SS3n

OUTOUT

MODE_1MODE_1

SM_SPI2_SDO

O:SM_SPI2_SDOO:SM_SPI2_SDO

OUTOUT

MODE_0MODE_0

SM_SPI2_SDI

I:SM_SPI2_SDII:SM_SPI2_SDI

ININ

MODE_0MODE_0

SM_SPI2_SCLK

O:SM_SPI2_SCLKO:SM_SPI2_SCLK

OUTOUT

MODE_0MODE_0

SM_HDMI


SM_HDMI

SM_HDMI_TX_HPD

IO:SM_GPIO[2]IO:SM_GPIO[2]

OUTOUT

MODE_0MODE_0

SM_HDMI_CEC

IO:SM_HDMI_CECIO:SM_HDMI_CEC

IN/OUT

MODE_1MODE_1

SM_HDMI_RX_HPD

IO:SM_GPIO[20]IO:SM_GPIO[20]

OUTOUT

MODE_1MODE_1

SM_HDMI_RX_PWR5V

I:SM_HDMIRX_PWR5VI:SM_HDMIRX_PWR5V

ININ

MODE_0MODE_0

SoC Pin-demuxing usageSoC 引脚解复用用法

SL1680 System-on-chip (SoC) DomainSL1680 片上系统(SoC)Domain

Pad/Pin NamePad/Pin名称

Default Usage缺省用法

Direction方向

Mode Setting模式设置

SDIO


SDIO

SDIO_CDn

IO:SDIO_CDnIO:SDIO_CDn

ININ

MODE_0MODE_0

SDIO_WP

IO:GPIO[44]IO:GPIO[44]

OUTOUT

MODE_1MODE_1

SPI1


SPI1

SPI1_SS3n

IO:TW1B_SDAIO:TW1B_SDA

IN/OUT

MODE_3MODE_3

SPI1_SS2n

IO:TW1B_SCLIO:TW1B_SCL

OUTOUT

MODE_3MODE_3

SPI1_SS1n

O:PWM[1]O:PWM[1]

OUTOUT

MODE_4MODE_4

SPI1_SS0n

O:SPI1_SS0nO:SPI1_SS0n

OUTOUT

MODE_0MODE_0

SPI1_SDO

O:SPI1_SDOO:SPI1_SDO

OUTOUT

MODE_0MODE_0

SPI1_SCLK

O:SPI1_SCLKO:SPI1_SCLK

OUTOUT

MODE_0MODE_0

SPI1_SDI

I:SPI1_SDII:SPI1_SDI

ININ

MODE_0MODE_0

TW0


TW0

TW0_SCL

IO:TW0_SCLIO:TW0_SCL

OUTOUT

MODE_1MODE_1

TW0_SDA

IO:TW0_SDAIO:TW0_SDA

IN/OUT

MODE_1MODE_1

STS0/1


STS0/1

STS0_CLKSTS 0_CLK

I:URT3_RXDI:URT3_RXD

ININ

MODE_4MODE_4

STS0_SOP

O:URT3_TXDO:URT3_TXD

OUTOUT

MODE_4MODE_4

STS0_SD

I:URT3_CTSnI:URT3_CTSn

ININ

MODE_4MODE_4

STS0_VALD

O:URT3_RTSnO:URT3_RTSn

OUTOUT

MODE_4MODE_4

STS1_CLK

IO:GPIO[39]IO:GPIO[39]

IN/OUT

MODE_0MODE_0

STS1_SOP

IO:GPIO[38]IO:GPIO[38]

IN/OUT

MODE_0MODE_0

STS1_SD

IO:GPIO[37]IO:GPIO[37]

IN/OUT

MODE_0MODE_0

STS1_VALD

IO:GPIO[36]IO:GPIO[36]

IN/OUT

MODE_0MODE_0

USB2


USB2

USB2_DRV_VBUS

IO:GPIO[55]IO:GPIO[55]

OUTOUT

MODE_1MODE_1

RGMII


RGMII

RGMII_MDC

O:RGMII_MDCO:RGMII_MDC

OUTOUT

MODE_0MODE_0

RGMII_MDIO

IO:RGMII_MDIOIO:RGMII_MDIO

IN/OUTIN/OUT

MODE_0MODE_0

RGMII_TXC

O:RGMII_TXCO:RGMII_TXC

OUTOUT

MODE_0MODE_0

RGMII_TXD[0]RGMII_TXD[0]

O:RGMII_TXD[0]O:RGMII_TXD[0]

OUTOUT

MODE_0MODE_0

RGMII_TXD[1]

O:RGMII_TXD[1]O:RGMII_TXD[1]

OUTOUT

MODE_0MODE_0

RGMII_TXD[2]RGMII_TXD[2]

O:RGMII_TXD[2]O:RGMII_TXD[2]

OUTOUT

MODE_0MODE_0

RGMII_TXD[3]

O:RGMII_TXD[3]O:RGMII_TXD[3]

OUTOUT

MODE_0MODE_0

RGMII_TXCTL

O:RGMII_TXCTLO:RGMII_TXCTL

OUTOUT

MODE_0MODE_0

RGMII_RXC

I:RGMII_RXCI:RGMII_RXC

ININ

MODE_0MODE_0

RGMII_RXD[0]

I:RGMII_RXD[0]I:RGMII_RXD[0]

ININ

MODE_0MODE_0

RGMII_RXD[1]

I:RGMII_RXD[1]I:RGMII_RXD[1]

ININ

MODE_0MODE_0

RGMII_RXD[2]RGMII_RXD[2]

I:RGMII_RXD[2]I:RGMII_RXD[2]

ININ

MODE_0MODE_0

RGMII_RXD[3]

I:RGMII_RXD[3]I:RGMII_RXD[3]

ININ

MODE_0MODE_0

RGMII_RXCTL

I:RGMII_RXCTLI:RGMII_RXCTL

ININ

MODE_0MODE_0

I2S1


I2S1

I2S1_MCLK

IO:I2S1_MCLKIO:I2S1_MCLK

OUTOUT

MODE_1MODE_1

I2S1_LRCK

IO:I2S1_LRCKIOIO:I2S1_LRCKIO

IN/OUT

MODE_1MODE_1

I2S1_BCLK

IO:I2S1_BCLKIOIO:I2S1_BCLKIO

IN/OUTIN/OUT

MODE_1MODE_1

I2S1_DO[0]

O:I2S1_DO[0]O:I2S1_DO[0]

OUTOUT

MODE_1MODE_1

I2S1_DO[1]

IO:GPIO[17]IO:GPIO[17]

ININ

MODE_0MODE_0

I2S1_DO[2]I2S1_DO[2]

O:PWM[2]O:PWM[2]

OUTOUT

MODE_2MODE_2

I2S1_DO[3]

IO:GPIO[15]IO:GPIO[15]

ININ

MODE_0MODE_0

I2S2


I2S2

I2S2_MCLK

IO:PDMB_CLKIOIO:PDMB_CLKIO

OUTOUT

MODE_2MODE_2

I2S2_LRCK

IO:I2S2_LRCKIOIO:I2S2_LRCKIO

IN/OUT

MODE_1MODE_1

I2S2_BCLK

IO:I2S2_BCLKIOIO:I2S2_BCLKIO

IN/OUT

MODE_1MODE_1

I2S2_DI[0]

I:I2S2_DI[0]I:I2S2_DI[0]

ININ

MODE_1MODE_1

I2S2_DI[1]

IO:GPIO[10]IO:GPIO[10]

IN/OUT

MODE_0MODE_0

I2S2_DI[2]

I:PDMA_DI[1]I:PDMA_DI[1]

ININ

MODE_2MODE_2

I2S2_DI[3]

I:PDMA_DI[0]I:PDMA_DI[0]

ININ

MODE_2MODE_2

I2S3


I2S3

I2S3_LRCK

IO:I2S3_LRCKIOIO:I2S3_LRCKIO

IN/OUT

MODE_1MODE_1

I2S3_BCLK

IO:I2S3_BCLKIOIO:I2S3_BCLKIO

IN/OUTIN/OUT

MODE_1MODE_1

I2S3_DI

I:I2S3_DII:I2S3_DI

ININ

MODE_1MODE_1

I2S3_DO

O:I2S3_DOO:I2S3_DO

OUTOUT

MODE_1MODE_1

SPDIF


SPDIF

SPDIFO

O:SPDIFOO:SPDIFO

OUTOUT

MODE_1MODE_1

SPDIFISpdifi的

IO:GPIO[4]IO:GPIO[4]

ININ

MODE_0MODE_0

HDMI_TX_EDDC


HDMI_TX_EDDC

HDMI_TX_EDDC_SCL

IO:TX_EDDC_SCLIO:TX_EDDC_SCL

OUTOUT

MODE_0MODE_0

HDMI_TX_EDDC_SDA

IO:TX_EDDC_SDAIO:TX_EDDC_SDA

IN/OUT

MODE_0MODE_0

Pin-demuxing for GPIO/GPO ConfigurationGPIO/GPO的引脚解复用配置

This section covers pin-demuxed GPIO/GPO usage of SM (SM GPIO/GPO usage) and SoC (SoC GPIO/GPO Usage) domains.
本节介绍SM (SM GPIO/GPO用法)和SoC (SoC GPIO/GPO用法)域的引脚解复用GPIO/GPO用法。

SM GPIO/GPO usageSM GPIO/GPO用法

SL1680 SM

Availability可用性

Direction方向

Default Function缺省功能

GPIO SignalingGPIO信号

GPIO/GPOGPIO/GPO

SM_GPIO [0]

Not Available不可用

OUTOUT

IO:RX_EDID_SCLIO:RX_EDID_SCL

SM_GPIO [1]

Not Available不可用

IN/OUT

IO:RX_EDID_SDAIO:RX_EDID_SDA

SM_GPIO [2]

MODE_0MODE_0

OUTOUT

HDMI-RX_HPD_MUTEnHDMI—RX_HPD_MUTEn

0: Assertion MUTE for HDMI-RX HPD0:Assertion MUTE for HDMI-RX HPD

1: De-assertion to align PWR_5V status1:De-assertion to align PWR_5V status

SM_GPIO [3]

Not Available不可用

IN/OUT

SM_HDMI_CEC

SM_GPIO [4]

Not Available不可用

OUTOUT

IO:SM_TW2B_SCLIO:SM_TW2B_SCL

SM_GPIO [5]

Not Available不可用

IN/OUT

IO:SM_TW2B_SDAIO:SM_TW2B_SDA

SM_GPIO [6]

MODE_1MODE_1

IN/OUTIN/OUT

Not Assigned未分配

SM_GPIO [7]

MODE_1MODE_1

ININ

GePHY_WAKE#

0: Triggered Wakeup from M.2 and GE0:Triggered Wakeup from M.2 and GE

1: Idle1:空闲

SM_GPO [8]SM_GPO [8]

MODE_1MODE_1

OUTOUT

GePHY_RST#GePHY_RST#

0: De-assertion0:De-assertion

1: Assertion Reset for GE PHY IC1:Assertion Reset for GE PHY IC

SM_GPIO [9]

Not Available不可用

OUTOUT

IO:SM_TW3_SCLIO:SM_TW3_SCL

SM_GPIO [10]

Not Available不可用

IN/OUTIN/OUT

IO:SM_TW3_SDAIO:SM_TW3_SDA

SM_GPIO [11]

MODE_0MODE_0

OUTOUT

O:SM_SPI2_SCLKO:SM_SPI2_SCLK

SM_GPIO [12]

MODE_0MODE_0

ININ

I:SM_SPI2_SDII:SM_SPI2_SDI

SM_GPO [13]SM_GPO [13]

MODE_0MODE_0

OUTOUT

O:SM_SPI2_SDOO:SM_SPI2_SDO

SM_GPIO [14]

MODE_1MODE_1

OUTOUT

O:SM_SPI2_SS3nO:SM_SPI2_SS3n

SM_GPO [15]SM_GPO [15]

MODE_2MODE_2

ININ

USB2_Ocn

0: Assertion for Over-Current on USB2.0 Connector
0:Assertion for Over-Current on USB2.0 Connector

1: Idle1:空闲

SM_GPO [16]SM_GPO [16]

MODE_1MODE_1

OUTOUT

O:SM_SPI2_SS1nO:SM_SPI2_SS1n

SM_GPO [17]SM_GPO [17]

MODE_0MODE_0

OUTOUT

O:SM_SPI2_SS0nO:SM_SPI2_SS0n

SM_GPIO [18]

Not Available不可用

ININ

I:SM_URT0_RXDI:SM_URT0_RXD

SM_GPO [19]SM_GPO [19]

Not Available不可用

OUTOUT

O:SM_URT0_TXDO:SM_URT0_TXD

SM_GPIO [20]

MODE_1MODE_1

OUTOUT

Level shifter enable for 40pin Header使能40针接头的电平转换器

0: Enable0:使能

1: Disable1:禁用

SM_GPIO [21]

Not Available不可用

ININ

I:SM_HDMIRX_PWR5VI:SM_HDMIRX_PWR5V

SoC GPIO/GPO UsageSoC GPIO/GPO用法

SL1680 SoC

Availability可用性

Direction方向

Default Function缺省功能

GPIO SignalingGPIO 信号

GPIO/GPOGPIO/GPO

SOC_GPIO[0]

Not Available不可用

ININ

I:I2S3_DII:I2S3_DI

M.2 I2S_DI

SOC_GPIO[1]

Not Available不可用

OUTOUT

O:I2S3_DOO:I2S3_DO

M.2 I2S_DO

SOC_GPIO[2]SOC_GPIO[2]

Not Available不可用

IN/OUT

IO:I2S3_BCLKIOIO:I2S3_BCLKIO

M.2 I2S_BCLK

SOC_GPIO[3]

Not Available不可用

IN/OUT

IO:I2S3_LRCKIOIO:I2S3_LRCKIO

M.2 I2S_LRCLK

SOC_GPIO[4]SOC_GPIO[4]

MODE_0MODE_0

ININ

FAN_TACH_CONFAN_TACH_CON

0: Error0:错误

1: Normal1:正常

SOC_GPIO[5]

Not Available不可用

IN/OUT

IO:TX_EDDC_SDAIO:TX_EDDC_SDA

SOC_GPIO[6]

Not Available不可用

OUTOUT

IO:TX_EDDC_SCLIO:TX_EDDC_SCL

SOC_GPO[7]SOC_GPO[7]

MODE_2MODE_2

OUTOUT

IO:PDMB_CLKIOIO:PDMB_CLKIO

To 40Pin HeaderTo 40Pin Header

SOC_GPIO[8]SOC_GPIO[8]

MODE_2MODE_2

ININ

I:PDMA_DI[0]I:PDMA_DI[0]

To 40Pin HeaderTo 40Pin Header

SOC_GPIO[9]

MODE_2MODE_2

ININ

I:PDMA_DI[1]I:PDMA_DI[1]

To 40Pin HeaderTo 40Pin Header

SOC_GPIO[10]SOC_GPIO[10]

MODE_0MODE_0

IN/OUT

IO:GPIO[10]IO:GPIO [10]

To 40Pin HeaderTo 40Pin Header

SOC_GPIO[11]

MODE_1MODE_1

ININ

I:I2S2_DI[0]I:I2S2_DI[0]

To 40Pin HeaderTo 40Pin Header

SOC_GPIO[12]

MODE_1MODE_1

IN/OUTIN/OUT

IO:I2S2_BCLKIOIO:I2S2_BCLKIO

To 40Pin HeaderTo 40Pin Header

SOC_GPIO[13]SOC_GPIO[13]

MODE_1MODE_1

IN/OUT

IO:I2S2_LRCKIOIO:I2S2_LRCKIO

To 40Pin HeaderTo 40Pin Header

SOC_GPIO[14]

Not Available不可用

OUTOUT

O:SPDIFOO:SPDIFO

In reserved保留

SOC_GPIO[15]

MODE_0MODE_0

ININ

USB-C-Logic _INTn

0: USB2.0 host mode0:USB2.0 主机模式

1: USB2.0 device mode1:USB2.0 设备模式

SOC_GPIO[16]

MODE_2MODE_2

OUTOUT

O:PWM[2]O:PWM[2]

PWM for FANPWM for FAN

SOC_GPIO[17]

MODE_0MODE_0

ININ

EXT-GPIO_INTR#EXT—GPIO_INTR#

0: Triggered interrupt from GPIO Expander
0:GPIO扩展器触发的中断

1: Idle1:空闲

SOC_GPIO[18]

MODE_1MODE_1

OUTOUT

IO:I2S1_MCLKIO:I2S1_MCLK

To 40Pin HeaderTo 40Pin Header

SOC_GPO[19]SOC_GPO[19]

MODE_1MODE_1

OUTOUT

O:I2S1_DO[0]O:I2S1_DO[0]

To 40Pin HeaderTo 40Pin Header

SOC_GPIO[20]

MODE_1MODE_1

IN/OUTIN/OUT

IO:I2S1_BCLKIOIO:I2S1_BCLKIO

To 40Pin HeaderTo 40Pin Header

SOC_GPIO[21]SOC_GPIO[21]

MODE_1MODE_1

IN/OUT

IO:I2S1_LRCKIOIO:I2S1_LRCKIO

To 40Pin HeaderTo 40Pin Header

SOC_GPO[22]SOC_GPO[22]

Not Available不可用

OUTOUT

O:RGMII_TXCTLO:RGMII_TXCTL

SOC_GPO[23]SOC_GPO[23]

Not Available不可用

OUTOUT

O:RGMII_TXCO:RGMII_TXC

SOC_GPO[24]SOC_GPO[24]

Not Available不可用

OUTOUT

O:RGMII_TXD[3]O:RGMII_TXD[3]

SOC_GPO[25]SOC_GPO[25]

Not Available不可用

OUTOUT

O:RGMII_TXD[2]O:RGMII_TXD[2]

SOC_GPO[26]SOC_GPO[26]

Not Available不可用

OUTOUT

O:RGMII_TXD[1]O:RGMII_TXD [1]

SOC_GPO[27]SOC_GPO[27]

Not Available不可用

OUTOUT

O:RGMII_TXD[0]O:RGMII_TXD[0]

SOC_GPIO[28]SOC_GPIO[28]

Not Available不可用

IN/OUT

IO:RGMII_MDIOIO:RGMII_MDIO

SOC_GPIO[29]SOC_GPIO[29]

Not Available不可用

OUTOUT

O:RGMII_MDCO:RGMII_MDC

SOC_GPIO[30]

Not Available不可用

ININ

I:RGMII_RXCTLI:RGMII_RXCTL

SOC_GPIO[31]

Not Available不可用

ININ

I:RGMII_RXCI:RGMII_RXC

SOC_GPIO[32]SOC_GPIO[32]

Not Available不可用

ININ

I:RGMII_RXD[3]I:RGMII_RXD[3]

SOC_GPIO[33]

Not Available不可用

ININ

I:RGMII_RXD[2]I:RGMII_RXD[2]

SOC_GPIO[34]

Not Available不可用

ININ

I:RGMII_RXD[1]I:RGMII_RXD[1]

SOC_GPIO[35]

Not Available不可用

ININ

I:RGMII_RXD[0]I:RGMII_RXD[0]

SOC_GPIO[36]

MODE_0MODE_0

IN/OUT

IO:GPIO[36]IO:GPIO[36]

To 40Pin HeaderTo 40Pin Header

SOC_GPIO[37]

MODE_0MODE_0

IN/OUTIN/OUT

IO:GPIO[37]IO:GPIO[37]

To 40Pin HeaderTo 40Pin Header

SOC_GPIO[38]SOC_GPIO[38]

MODE_0MODE_0

IN/OUT

IO:GPIO[38]IO:GPIO[38]

To 40Pin HeaderTo 40Pin Header

SOC_GPIO[39]

MODE_0MODE_0

IN/OUT

IO:GPIO[39]IO:GPIO[39]

To 40Pin HeaderTo 40Pin Header

SOC_GPIO[40]SOC_GPIO[40]

Not Available


不可用

OUTOUT

O:URT3_RTSnO:URT3_RTSn

For M.2 URT3_RTSn用于M.2 URT3_RTSn

SOC_GPIO[41]SOC_GPIO[41]

Not Available


不可用

ININ

I:URT3_CTSnI:URT3_CTSn

For M.2 URT3_CTSn用于M.2 URT3_CTSn

SOC_GPIO[42]

Not Available


不可用

OUTOUT

O:URT3_TXDO:URT3_TXD

For M.2 URT3_TXD用于M.2 URT3_TXD

SOC_GPIO[43]

Not Available


不可用

ININ

I:URT3_RXDI:URT3_RXD

For M.2 URT3_RXD用于M.2 URT3_RXD

SOC_GPIO[44]

MODE_1MODE_1

OUTOUT

MicroSD_PWR_ON

0: Power Down0:下电

1: Power Up1:上电

SOC_GPIO[45]

Not Available不可用

ININ

IO:SDIO_CDnIO:SDIO_CDn

SOC_GPIO[46]

Not Available不可用

IN/OUT

IO:TW0_SDAIO:TW0_SDA

SOC_GPIO[47]

Not Available不可用

OUTOUT

IO:TW0_SCLIO:TW0_SCL

SOC_GPIO[48]

Not Available不可用

ININ

I:SPI1_SDII:SPI1_SDI

SOC_GPIO[49]

Not Available不可用

OUTOUT

O:SPI1_SCLKO:SPI1_SCLK

SOC_GPO[50]SOC_GPO[50]

Not Available不可用

OUTOUT

O:SPI1_SDOO:SPI1_SDO

SOC_GPIO[51]

Not Available不可用

IN/OUT

IO:TW1B_SDAIO:TW1B_SDA

SOC_GPIO[52]

Not Available不可用

OUTOUT

IO:TW1B_SCLIO:TW1B_SCL

SOC_GPIO[53]SOC_GPIO[53]

MODE_4MODE_4

OUTOUT

O:PWM[1]O:PWM[1]

To 40Pin HeaderTo 40Pin Header

SOC_GPO[54]SOC_GPO[54]

Not Available不可用

OUTOUT

O:SPI1_SS0nO:SPI1_SS0n

SOC_GPIO[55]

MODE_1MODE_1

OUTOUT

HDMI-TX_PWR_ONHDMI—TX_PWR_ON

0: Power Down HDMI-TX 5V0:HDMI-TX 5V下电

1: Power Up1:上电

GPIO Expanders Over I2C通过I2C的GPIO扩展器

Due to the considerable number of functionalities covered by the SL1680 evaluation system, most of the SL1680 digital pins that have GPIO/GPO pin-demux options are used for other functions. As such, GPIO expanders are used extensively to supplement system control purposes.
由于SL1680评估系统涵盖了相当多的功能, 大多数具备GPIO/GPO复用功能选项的SL1680数字引脚都可用于其他功能。因此,GPIO扩展器被广泛应用于扩充系统控制。

GPIO expanders usageGPIO扩展器用途

Expander扩展器

I2C#I2C#

DomainDomain

Voltage电压

Direction方向

Function功能

GPIO SignalingGPIO 信号

GPIO/GPOGPIO/GPO

GPIO0_0

SM_TW3 (0x43)SM_TW3(0x43)

SM

3.3

OUTOUT

VCPU/VCORE_ON#

0: Power ON VCPU/VCORE PMIC0:VCPU/VCORE PMIC 上电

1: Power OFF1:下电

GPIO0_1GPIO0_1

SM_TW3 (0x43)SM_TW3(0x43)

SM

3.3

OUTOUT

PWR_ON_DSI

0: Power OFF0:下电

1: Power ON1:上电

GPIO0_2

SM_TW3 (0x43)SM_TW3(0x43)

SM

3.3

OUTOUT

VDDM_ON#VDDM_ON#

0: Power ON all VDDM PMICs (1V8/1V1/0V6)0:所有VDDM PMICs(1V8/1V1/0V6)上电

1: Power OFF1:下电

GPIO0_3

SM_TW3 (0x43)SM_TW3(0x43)

SM

3.3

OUTOUT

VDDM-LPQ_OFF#

0: Power ON VDDM-LP PMICs (0V6)0:VDDM—LP PMICs(0V6)上电

1: Power OFF1:下电

GPIO0_4

SM_TW3 (0x43)SM_TW3(0x43)

SM

3.3

OUTOUT

STAND-BY_ENSTAND-BY_EN

0: Normal status0:正常状态

1: Entry to Stand-By status with devices Powered down
1:进入待机状态且设备下电

GPIO0_5

SM_TW3 (0x43)SM_TW3(0x43)

SM

3.3

OUTOUT

USB2.0_PWR_EN

0: Power OFF0:下电

1: Power ON1:上电

GPIO0_6

SM_TW3 (0x43)SM_TW3(0x43)

SM

3.3

ININ

M2-PCIe_CLKREQ#M2-PCIe_CLKREQ#

0: Triggered for M.2 PCIe Clock Request0:M.2 PCIe 时钟请求被触发

1: Idle1:空闲

GPIO0_7

SM_TW3 (0x43)SM_TW3(0x43)

SM

3.3

IN/OUTIN/OUT

GPIO_DSI

In reserved保留

In reserved保留

GPIO1_0

SM_TW3 (0x44))SM_TW3(0x44))

SM

3.3V

IN/OUT

GPIO_CSI0

In reserved保留

In reserved保留

GPIO1_1

SM_TW3 (0x44)SM_TW3(0x44)

SM

3.3V

OUTOUT

M2-PCIe_RST#M2—PCIe_RST#

0: Assertion Reset for M.2 PCIe Module0:发出 M.2 PCIe 模块 复位信号

1: De-assertion1:De-assertion

GPIO1_2

SM_TW3 (0x44)SM_TW3(0x44)

SM

3.3V

OUTOUT

M2-W_DISABLE1#M2—W_DISABLE1#

0: Assertion Disable to M.2 module by DISABLE1#
0:通过 DISABLE1# 向 M.2 模块发出Disable信号

1: De-assertion1:De-assertion

GPIO1_3

SM_TW3 (0x44)SM_TW3(0x44)

SM

3.3V

OUTOUT

M2-W_HOST-WAKE#M2-W_HOST-WAKE#

0: Assertion Wake from Host to M.2 module0:从主机向M.2模块发出唤醒信号

1: De-assertion1:De-assertion

GPIO1_4

SM_TW3 (0x44)SM_TW3(0x44)

SM

3.3V

OUTOUT

PWR_ON_CSI0PWR_ON_CSI0

0: Power OFF0:下电

1: Power ON1:上电

GPIO1_5

SM_TW3 (0x44)SM_TW3(0x44)

SM

3.3V

OUTOUT

M2-W_DISABLE2#M2—W_DISABLE2#

0: Assertion Disable to M.2 module by DISABLE2#
0:通过 DISABLE2# 向 M.2 模块发出Disable信号

1: De-assertion1:De-assertion

GPIO1_6

SM_TW3 (0x44)SM_TW3(0x44)

SM

3.3V

IN/OUT

GPIO_CSI1

In reserved保留

In reserved保留

GPIO1_7

SM_TW3 (0x44)SM_TW3(0x44)

SM

3.3V

OUTOUT

PWR_ON_CSI1

0: Power OFF0:下电

1: Power ON1:上电

I2C BusI2C 总线

This section describes the Astra Machina’s usage of the I2C bus, the equivalence of SL1680’s Two Wire Serial Interface (TWSI) bus.
本节介绍Astra Machina I2C 总线的用法,等价于SL1680的Two Wire Serial Interface(TWSI)总线。

I2C bus descriptions I2C总线描述

I2C/TWSI BusI2C/TWSI总线

Device设备

Part Number器件编号

Ref Des

Target Address目标地址

(7-bit)(7位)

Location位置

SM_TW3

IC GPIO EXPANDER I2C 8BitIC GPIO EXPANDER I2C 8Bit

FXL6408UMXFXL6408UMX

U12

0x43

SL16x0 I/O boardSL16x0 I/O板

IC GPIO EXPANDER I2C 8BitIC GPIO EXPANDER I2C 8Bit

FXL6408UMXFXL6408UMX

U13u13

0x44

SL16x0 I/O boardSL16x0 I/O板

External device connects to MIPI_CSI0 connector
外部设备连接到MIPI_CSI0连接器

Not applicable不适用

J206J206

0xXX0xxx

SL16x0 I/O boardSL16x0 I/O板

SM_TW2B

IC REG, default 0.8V Vout /5mV Step, 6A rating, Input 6V@Max, Step-Down Convertor with I2C
IC REG,缺省0.8V Vout /5mV步进,6A额定值,输入 6V@Max,带I2C的降压转换器

TPS62870Y1QWRXSRQ1TPS62870Y1QWRXSRQ1

U3

0x40

SL1680 core moduleSL1680 核心模块

SOC_TW1B

IC REG, default 0.8V Vout /5mV Step, 6A rating, Input 6V@Max, Step-Down Convertor with I2C
IC REG,缺省0.8V Vout /5mV步进,6A额定值,输入 6V@Max,带I2C的降压转换器

TPS62870Y1QWRXSRQ1TPS62870Y1QWRXSRQ1

U2

0x40

SL1680 core moduleSL1680 核心模块

SOC_TW0

External device connects to MIPI_CSI1 connector
外部设备连接到MIPI_CSI1连接器

Not applicable不适用

J207J207

0xXX

SL16x0 I/O boardSL16x0 I/O板

External device connects to MIPI_DSI connector
外部设备连接到MIPI_DSI连接器

Not applicable不适用

J208J208

0xXX

SL16x0 I/O boardSL16x0 I/O板

External device connects to 40pin Header外部设备连接到40针接头

Not applicable不适用

J32

0xXX

SL16x0 I/O boardSL16x0 I/O板

Bringing Up the SL1680 Astra Machina System 点亮SL1680 Astra Machina系统

Connecting External Components and Performing Hardware Testing 连接外部组件并执行硬件测试

Perform the following steps to connect the external components to the SL1680 evaluation system:
执行以下步骤, 将外部组件连接到SL1680评估系统:

  1. Connect a TypeC power supply to J213 (PWR_IN).
    将TypeC电源连接到J213(PWR_IN)。

  2. Connect TV to J12 (HDMI_Tx) with a HDMI cable.
    用HDMI电缆将电视连接到J12(HDMI_Tx)。

  1. Connect Network to J2 (RJ45) with an Ethernet cable.
    用以太网电缆将网络连接到J2(RJ45)。

  2. Insert USB3.0 flash disk to J216 /J210 (USB3.0).
    将USB3.0闪存盘插入J216 /J210(USB3.0)。

  3. Insert USB2.0 flash disk to J215 (USB2.0) over TypeC/TypeA dongle.
    通过TypeC/TypeA转换器将USB2.0闪存盘插入J215(USB2.0)。

If there are no short issues, power up the system and check voltages as shown in Table 16, the LED status is shown in Table 1.
如果没有短路问题,则接通系统电源并检查电压, 如表16所示,LED状态如表1所示。

../_images/image20.png

Short and voltage check points


短路和电压检查点

Short and voltage check points using any test point for ground
使用任何接地测试点进行短路和电压检查

Ref Des

FormForm

Signal信号

Voltage电压

C1274

Right padRight pad

PWR_5V

5.2V +/- 2%

[5.096,5.304]


5.2V +/- 2%

[5.096,5.304]

TP195

SMD padSMD pad

PWR_3V3

3.3V +/- 1%

[3.267,3.333]


3.3V +/- 1%

[3.267,3.333]

TP194

SMD padSMD pad

PWR_1V8

1.8V +/- 2%

[1.764,1.836]


1.8V +/- 2%

[1.764,1.836]

TP177

SMD padSMD pad

PWR_3V3-M2

3.3V +/- 1%

[3.267,3.333]


3.3V +/- 1%

[3.267,3.333]

TP178

SMD padSMD pad

PWR_VDDM_1V8

1.8V +/- 2%

[1.764,1.836]


1.8V +/- 2%

[1.764,1.836]

TP179

SMD padSMD pad

PWR_VDDM_1V1

1.1V +/- 2%

[1.078,1.122]


1.1V +/- 2%

[1.078,1.122]

TP180

SMD padSMD pad

PWR_VDDM_1V1&0V6

0.6V +/- 2%

[0.588,0.612]


0.6V +/— 2%

[0.588,0.612]

TP181

SMD padSMD pad

PWR_SoC_VCORE

0.8V +/- 2%

[0.784,0.816]


0.8V +/— 2%

[0.784,0.816]

TP182

SMD padSMD pad

PWR_SoC_VCPU

0.8V +/- 2%

[0.784,0.816]


0.8V +/- 2%

[0.784,0.816]

TP190

SMD padSMD pad

PWR_VDD_SM

0.8V +/- 2%

[0.784,0.816]]


0.8V +/— 2%

[0784,0816]]

References参考资料

The following document is applicable to the SL1680 evaluation system:
以下文件适用于SL1680评估系统:

  • SL1680 Datasheet (PN: 505-001413-01)
    SL1680 Datasheet (PN:505-001413-01)