SL1620用户指南

Introduction介绍

The Astra Machina Foundation Series of evaluation-ready kits enable easy and rapid prototyping for the Synaptics SL series of multi-modal embedded processors. A modular design incorporates swappable core compute modules, a common I/O board, and daughter cards for connectivity, debug, and flexible I/O options.
Astra Machina Foundation系列评估套件 使Synaptics SL系列多模式嵌入式处理器能够轻松快速地进行原型设计。 模块化设计包含可更换的核心计算模块、通用I/O板和子卡,用于连接、调试和灵活的I/O选项。

The Synaptics Astra SL-Series is a family of highly integrated AI-native Linux and Android SoCs optimized for multi-modal consumer, enterprise, and industrial IoT workloads with hardware accelerators for edge inferencing, security, graphics, vision, and audio. The SL1620 is designed and optimized for embedded applications that require powerful processing, advanced AI capability, and 3D graphics. This chip comes with Linux® OS, superior audio algorithms, a variety of peripherals, dual displays, companion Synaptics SoC for connectivity and audio front end.
Synaptics Astra SL系列是一个高度集成的人工智能原生Linux和Android SoC系列, 针对多模式消费者、企业和工业物联网工作负载进行了优化,具有边缘推理、安全、图形、视觉和音频的硬件加速器。 SL1620专为需要强大处理、高级人工智能功能和3D图形的嵌入式应用程序而设计和优化。 该芯片配有Linux®操作系统、卓越的音频算法、各种外围设备、双显示器、用于连接和音频前端的配套Synaptics SoC。

Scope范围

This user guide describes the hardware configuration and functional details for the Astra Machina SL1620 core module, I/O card, and supported daughter cards, in addition to the bring-up sequence for the evaluation kit.
本用户指南介绍了Astra Machina SL1620核心模块、 I/O卡和支持的子卡的硬件配置和功能细节,以及评估套件的点亮顺序。

Definition of Board Components板卡组件的定义

  • Astra Machina: Combined system with core module, I/O board, and supported daughter cards.
    Astra Machina: 由核心模块、I/O板和支持的子卡构成的组合系统。

  • Core module: Processor subsystem module with key components including SL1620, eMMC, and DDR4.
    核心模块: 处理器子系统模块,包括SL1620、eMMC和LPDDR4x等关键组件。

  • I/O board: Common base board that includes various standard hardware interfaces, buttons, headers, and power-in.
    I/O板: 通用基板,包括各种标准硬件接口、按钮、接头和电源输入。

  • Daughter card: Add-on boards for supporting various features such as connectivity, debug, and other flexible I/O options.
    子卡: 用于支持各种功能的附加板,如连接、调试和其他灵活的I/O选项。

Astra Machina System OverviewAstra Machina系统概述

This section covers system features, block diagrams and top views of the Astra Machina evaluation kit.
本节涵盖系统功能、框图和 Astra Machina评估套件。

../_images/image5.png

SL1620 core module (Dimensions: WxH = 69.6 x 47.38mm)


SL1620核心模块(尺寸:宽x高= 69.6 x 47.38mm)

../_images/image6.png

I/O board


I/O板卡

Features特征

The SL1620 evaluation system includes the following components:
SL1620评估系统包括以下组件:

  • Main components on the core-module:核心模块上的主要组件:

    • Synaptics SL1620 Quad-Core Arm Cortex-A55
      Synaptics SL1620四核ARM Cortex-A55

      Embedded IoT Processor, up to 1.9 GHz嵌入式物联网处理器,高达1.9 GHz。

    • Storage: eMMC5.1 (16 GByte)存储:eMMC5.1(16 GByte)。

    • DRAM: x32 2GB system memory by 2pcs x16, 8-Gbit, DDR4-2133
      DRAM:x32 2GB系统内存,使用2颗 x16 8-Gbit LPDDR4x。

    • PMIC: support DVFS in Vcore supply railPMIC:支持Vcore供电轨中的DVFS。

    • SD Card ReceptacleSD卡插座。

    • Line-out: direct Line Level 2.1-VRMS stereo output
      Line Out:直接Line Level 2.1-VRMS 立体声输出。

    • DMIC: 2 digital microphones – 1 PDM stereo audio input
      DMIC:两个数字麦克风 — 1个PDM立体声音频输入。

    • LCDC(RGB): on 54-pins FPC connector to support RGB 16bpp, 18bpp and 24bpp output formats; up to 1080p30 screen resolution
      LCDC(RGB): 在54引脚FPC连接器上,支持RGB 16bpp、18bpp和24bpp输出格式;高达1080p30屏幕分辨率。

  • Main components on I/O board:I/O板上的主要组件:

    • M.2 E-key 2230 Receptacle: It supports SDIO, UART for WiFi/BT modules
      M.2 E-key 2230插座: 支持用于Wi—Fi/BT模块的SDIO、PCIe、UART。

    • USB 3.0 Type-A: 4 ports to supports host mode at SuperSpeed
      USB 3.0 Type-A:4个端口,支持SuperSpeed主机模式。

    • USB 2.0 Type-C: supports OTG host or peripheral mode at Hi-Speed
      USB 2.0 Type-C:支持高速OTG主机或外设模式。

    • Push buttons: used for USB-BOOT selection and system RESET
      按钮:用于USB-BOOT选择和系统重启。

    • 2pin Header: used for SD-BOOT selection2针接头:用于SD-BOOT选择。

  • Off-board daughter card interface options:
    外接子卡接口选项:

    • MIPI DSI on 22-pin FPC interface to support 4-lane DPHY plus I2C and GPIOs for up to 1080p60 display panel
      MIPI DSI 在22针FPC接口上, 支持4-lane DPHY加I2C和GPIO,用于最高1080p60的显示面板。

    • ISP 12-pin daughter card to support offline program SPI NOR flash on Core-Module
      ISP 12针子卡, 支持核心模块上离线编程的SPI NOR闪存。

    • JTAG daughter card for debug调试用的JTAG子卡。

    • 40-pin header for additional functions40-针接头用于附加功能。

    • 4-pin PoE+ daughter card to support an add-on voltage regulator module for PoE+ Type2 (802.3at) power device; available power shall be 25.5W (Class 4) at 5Vpins of 40-pin header to I/O board
      4针 PoE+ 子卡, 支持 PoE+Type2(802.3at)电源设备的附加电压调节器模块。在40针接头到I/O板的5V引脚处,可用功率应为25.5W(4级)。

    • 4-pin connector for active Fan with PWMPWM有源风扇的4针接头。

    • Type-C power supply with 15V @ 1.8AType—C电源,15V@1.8A。

SL1620 system block diagramSL1620系统框图

../_images/image7.jpg

SL1620 system block diagram


SL1620系统框图

Top view of SL1620 Astra Machina Evaluation SystemSL1620 Astra Machina评估系统的俯视图

../_images/image8.png

Top view of SL1620 evaluation system


SL1620评估系统俯视图

System connectors系统连接器

../_images/image9.png

Front view


前视图

../_images/image10.png

Rear view


后视图

Astra Machina Board Control/Status & System I/OAstra Machina板控制/状态&系统I/O

This section covers booting up, LEDs status indicators, buttons, connectors, and pin-strap settings.
本节介绍启动、LED状态指示灯、按钮, 连接器和pin-strap设置。

Booting up启动

There are three types of booting up, select one bootup before powering on the Astra Machina.
Astra Machina支持三种启动方式, 上电前用户可选一种。

  • eMMC boot: Default booting up.
    eMMC启动: 默认启动方式。

  • SD boot: Short SD_Boot header by 2.54mm jumper-cap before power-up, see SD_Boot header in Locations of jumper on I/O board. Ensure SD-Card with firmware is plugged into SD-slot on Core Module in Locations on core module bottom side.
    SD启动: 通电前用2.54mm跳线帽短接SD_Boot接头,请参阅 I/O板的跳线位置 中的SD_Boot接头。 确保烧好固件的SD卡已插入核心模块上的SD插槽中,请参阅 核心模块背面位置图

  • USB boot: Connect USB-C usb2.0 port to the host PC, then follow the procedure in section 2.4.
    USB启动: 将USB—C usb2.0端口连接到主机PC,然后按照第2.4节中的步骤操作。

LEDsLED指示灯

LED locationsLED指示灯的位置

LED locations on I/O board shows the LED locations on the I/O board.
I/O板上的LED位置图 显示I/O板上的LED位置。

../_images/image11.png

LED locations on I/O board


I/O板上的LED位置图

LED definitionsLED定义

LED definitions on I/O boardI/O板上的LED定义

LED

Color颜色

LEDs FunctionLED功能

D10

Green绿色

LED indicator for USB3.0 Hub is working in normal mode or suspend mode.
LED指示灯用于标识USB3.0 Hub当前工作在正常模式下还是挂起模式下。

D17

Green绿色

LED indicator1 for M.2 device general purpose.
LED指示灯1用于标识M.2设备的通用用途。

D18

Green绿色

LED indicator2 for M.2 device general purpose.
LED指示灯2用于标识M.2设备的通用用途。

D37

Green绿色

LED indicator for USB-C PD power source status.
LED指示灯用于标识USB-C PD电源的状态。

D40

RED红色

LED indicator for Stand-by status.LED指示灯用于标识待机状态。

SoC Pinstrap and Bootup SettingsSoC PinStrap和启动设置

SoC pinstrap and bootup settings on core module
核心模块上的SOC Pinstrap和启动设置

Pad NamePad名称

Strap NameStrap名称

Setting Value配置值

Default*缺省*

Resistor Stuffing电阻装配

stuffed+装配

removed-移除

Description描述

Rpu = OnChip Pull-upRpu =片内上拉

Rpd = OnChip Pull-downRpd =片内下拉

TEST_ENTEST_EN

TEST_ENTEST_EN

SM TEST Enable (Rpd)SM TEST使能(Rpd)

0*0*

-R120

0: Enable ARM ICE JTAG connections (CoreSight)
0:使能ARM ICE JTAG连接(CoreSight)

1

+R120

1: Enable SCAN or BSCAN tests1:使能SCAN或BSCAN测试

JTAG_SEL

JTAG_SEL

SM JTAG Port Selection (Rpd)SM JTAG端口选择(Rpd)

0*0*

-R121

0: ARM ICE JTAG connections0:ARM ICE JTAG连接

1

+R121

1: Reserved for factory use1:为工厂预留

POR_EN

POR_EN

Power-on reset (POR) bypass (Rpu)上电复位(POR)旁路(Rpu)

0

+R4+R4

0: Bypass on-chip POR generator0:旁路片内POR发生器

1*1*

-R4

1: Enable on-chip POR generator1:使能片内POR发生器

PWM[0]

cpuRstBypscpuRstByps

CPU reset bypass strap (Rpd)CPU复位旁路Strap(Rpd)

0*0*

-R116

0: Enable reset logic inside CPU partition
0:使能CPU分区内的复位逻辑

1

+R116+R116

1: Bypass reset logic inside CPU partition
1:旁路CPU分区内的复位逻辑

SPI2_SCLK

pllPwrDown

SYS/MEM/CPU PLL Power Down;

Note: pllPwrDown should be set to 1 only when pllByps is also set to 1. (Rpd)


PLL/MEM/CPU PLL下电;

注意:只有当pllByps也设置为1时,pllPwrDown才应设置为1。(Rpd)

0*0*

-R123—R123

0: Power up0:上电

1

+R123+R123

1: Power down1:下电

USB2_DRV_USB2_DRV_

pllBypspllByps

SYS/MEM/CPU PLL bypass indicatorPLL/MEM/CPU PLL旁路标识

VBUS

0*0*

-R124—R124

0: No bypass0:无旁路

1

+R124+R124

1: All PLL bypassed1:所有PLL均被旁路

SPI2_SS0n

software_strap[1]

Straps for software usage (Rpd)软件用的Straps(Rpd)

0*0*

-R117—R117

1

+R117+R117

SPI1_SDO[0]

software_strap[2]

Straps for software usage (Rpd)软件用的Straps(Rpd)

0*0*

-R118

1

+R118+R118

SPI1_SCLK[1]

software_strap[3]software_strap[3]

Straps for software usage (Rpd)软件用的Straps(Rpd)

0*0*

-R119

1

+R119

I2S1_DO

boot_src[0]boot_src[0]

CPU Boot Source bit [0] (Rpu). See boot_src[1:0].

2’b00: SPI-Secure Boot

2’b01: ROM boot from NAND

2’b10: ROM boot from eMMC

2’b11: SPI-Clear boot


CPU boot源 位[0](Rpu)。请参阅 boot_src[1:0]。

2'b00:SPI-Secure Boot

2'b01:从NAND启动ROM boot

2'b10:从eMMC启动ROM boot

2'b11:SPI—Clear启动

0*0*

R105

ROM boot from SPI.从SPI启动ROM boot。

1

R107

ROM boot from NAND.从NAND启动ROM boot。

I2S2_DO

boot_src[1]boot_src[1]

CPU Boot Source bit [1] (Rpd). See boot_src[1:0].

2’b00: SPI-Secure Boot

2’b01: ROM boot from NAND

2’b10: ROM boot from eMMC

2’b11: SPI-Clear boot


CPU boot源 位[1](Rpu)。请参阅 boot_src[1:0]。

2'b00:SPI-Secure Boot

2'b01:从NAND启动ROM boot

2'b10:从eMMC启动ROM boot/p>

2'b11:SPI-Clear启动

0

R108

ROM boot from SPI.从SPI启动ROM boot。

1*1*

R106

ROM boot from eMMC.从eMMC启动ROM boot。

I2S3_DO

Legacy_bootLegacy_boot

Strap to reduce reset wait time (Rpd)减少复位等待时间的Strap(Rpd)

0*0*

-R122

0: 2 ms0:2毫秒

1

+R122

1: 20 ms1:20毫秒

Bootup settings on I/O boardI/O板上的启动设置

Net NameNet名称

Strap NameStrap名称

Setting Value配置值

Default*缺省*

Resistor Stuffing电阻装配

stuffed+装配

removed-移除

Description描述

Rpu = OnChip Pull-upRpu =片内上拉

Rpd = OnChip Pull-downRpd =片内下拉

USB_BOOTnUSB_BOOTn

USB-BootUSB-Boot

ROM code uses this strap to determine if booting from USB or not (Rpu)
ROM代码使用此strap来确定是否从USB启动(Rpu)。

0

0: Boot from USB when USB-BOOT button is pressed while system reset de-assertion.
0:在系统复位de-assertion时,当USB—BOOT按钮被按下,从USB启动。

1*1*

1: Boot from the device select by boot_src[1]
1:从boot_src[1]选择的设备启动。

CONN-SPI.VDDIO1P8.BOOT_SRC1CONN-SPI.VDDIO1P8.BOOT_SRC1

SD-Boot

ROM code uses this strap to determine if booting from SD_Card or not (Rpu)
ROM代码使用此Strap来确定是否从SD_Card启动(Rpu)。

0

0: Boot from SD_Card when SD_Boot header is on while system reset de-assertion.
0:在系统复位de-assertion时,当SD_Boot接头连上,从SD_Card启动。

1*1*

1: Boot from the device select by boot_src[1] when SD_Boot Header is off.
1:当SD_Boot接头断开,从boot_src[1]选择的设备启动。

Hardware Manual Button Settings硬件手动按钮设置

Hardware manual button settings definitions on I/O board
I/O板上的硬件手动按钮设置定义

Switch BlockSwitch Block

Type类型

Setting设置

Function功能

SW6 (RESET)SW6(RESET)

Momentary Pushbutton瞬时按钮

Push按压

SL1620 Reset Key assertedSL1620复位键置位

Release松开

Key de-assertedKey de-asserted

SW7(USB_BOOT)SW7(USB_BOOT)

Momentary Pushbutton瞬时按钮

Push按压

USB boot Key asserted. Needs combo RESET button. Read below steps on how to enter USB-Boot mode.
USB启动按键被激活。 需要组合RESET按钮。请阅读以下步骤,了解如何进入USB-boot模式。

Release松开

Key de-assertedKey de-asserted

To enter USB-Boot mode, follow these steps:
要进入USB引导模式, 请执行以下步骤:

Note注意

Prior to these steps, make sure the USB driver is installed successfully on PC host side. For details, please reference Astra Yocto Linux User Guide
在执行这些步骤之前, 请确保USB驱动已成功安装在PC主机端。 详情请参阅 Astra Yocto Linux用户指南

  1. Push RESET button to assert system reset to SL1620.
    按下RESET按钮, 向SL1620发出系统复位信号。

  2. Keep pushing RESET button and push USB_BOOT button at the same time for 1-2 seconds.
    保持按住RESET按键, 同时按下USB_BOOT按键,保持1—2秒。

  3. Release RESET button while holding USB_BOOT button, so SL1620 enters USB-Boot mode.
    在按住USB_BOOT按键的同时松开RESET按键, 使SL1620进入USB启动模式。

  4. Check and wait for the console print… messages.
    检查并等待Console打印消息。

    Once the console print is returned and entered USB boot successfully, release USB_BOOT button.
    当Console打印返回成功进入USB boot后, 即可松开USB_boot按钮。

../_images/image12.png

Locations of manual buttons on I/O board


I/O板上手动按钮的位置图

Hardware Jumper Settings硬件跳线设置

Hardware jumper settings definitions on I/O board
I/O板上的硬件跳线设置定义

Ref Des

Type类型

PinPin

Connection连接

Description描述

JP1

2x1 2.54mm header2x1 2.54mm接头

1-2

SD_Boot selectionSD_Boot 选择

  • Open: Boot from the device select by boot_src[1]


  • 断开:从boot_src[1]选择的设备启动。

  • Short: Boot from SD_Card while power-up or system reset de-assertion


  • 短路:在上电或系统复位信号de-assertion时,从SD卡启动。

To enter SD-Boot mode, follow these steps.
要进入SD-Boot模式,请执行以下步骤:

  1. Prior to these steps, make sure SD-Card with firmware is plugged into SD-slot on core module.
    在执行这些步骤之前, 请确保烧好固件的SD卡被插在核心模块的SD插槽上。

  1. Short SD_Boot header by 2.54mm jumper-cap before power-up.
    上电前请用2.54毫米跳线帽短接SD_boot接头。

  1. Power-up system, then boot-up from SD_Card.
    系统上电,然后从SD卡启动。

Locations of jumper on I/O board shows the Header locations on the I/O board.
I/O板上跳线的位置图 显示了I/O板上的接头位置。

../_images/image13.png

Locations of jumper on I/O board


I/O板上跳线的位置图

SL1620 Evaluation System ConnectorsSL1620评估系统连接器

Locations of core module connectors on top side核心模块正面的连接器位置

../_images/image14.png

Locations on core module top side


核心模块正面位置图

Locations of core module connectors on bottom side核心模块背面的连接器位置

../_images/image15.png

Locations on core module bottom side


核心模块背面位置图

Core module connector definitions核心模块连接器定义

Core module connector definitions核心模块连接器定义

Main主要

Connecting Boards/Devices (Ref Des if any)
连接的板卡/设备 (Ref Des,如有)

Functions功能

Remarks注释

Ref Des

J31

MicroSD CardMicroSD卡

SDIO cardSDIO卡

For micro-SD type of memory card extension.
用于micro-SD类型的存储卡扩展。

J35

LCD

LCD

Connects LCD panel daughter card through 54-pin FPC cable.
通过54针FPC电缆连接LCD面板子卡。

J37

Line outLine out

Analog audio L/R模拟音频L/R

Audio L/R output to 3.5mm Jack.音频L/R输出到3.5mm插孔。

U2, U3U2、U3

DMIC_L/R

PDM

Digital MIC_L/R input.数字MIC_L/R输入。

Locations of I/O board connectors on top sideI/O板正面的连接器位置

../_images/image16.png

Locations on I/O board top side


I/O板正面的位置图

Locations of I/O board connectors on bottom sideI/O板背面的连接器位置

../_images/image17.svg

Locations on I/O board bottom side


I/O板背面的位置图

I/O board connector definitionsI/O板连接器定义

I/O board connector definitionsI/O板连接器定义

Main主要

Connecting Boards/Devices (Ref Des if any)
连接的板卡/设备 (Ref Des(如有)

Functions功能

Remarks注释

Ref Des

J1

ISP D/C

SPI

12-pin daughter card to support offline program SPI NOR flash on core-module
12针子卡, 用于支持核心模块上离线编程的SPI NOR闪存。

J2

RJ45 cableRJ45电缆

Giga Ethernet千兆以太网

For Wired Ethernet connection用于有线以太网连接。

J12

HDMI SinkHDMI Sink

HDMI TX

Not applicable for SL1620.SL1620不适用。

J13

FAN风扇

Heat Dissipation w/ FAN散热器 w/ FAN

Active FAN with PWMPWM有源风扇。

J17

M.2 2230 D/C

SDIO and PCIeSDIO和PCIe

1x1/2x2 WiFi/Bluetooth card via SDIO

PCIe is not applicable for SL1620.


通过SDIO连接1x 1/2x2 WiFi/蓝牙卡。

PCIe不适用于SL1620。

J22

Debug Board调试板

JTAG

XDB debugger for debugging调试用的XDB调试器

J32

40-pins Header40针接头

UART, I2C, SPI, PDM, I2SI/O, GPIOs, STS1, PWMs, ADC
UART、I2C、SPI、PDM、I2SI/O、GPIO、STS 1、PWM、ADC

Flexible for support various D/C灵活支持各种D/C。

J34

PoE+ D/CPoE + D/C

PoE+Poe +

4-pin PoE+ daughter card with supporting an add-on 5V voltage to 40pin Header.
4针PoE+子卡,支持向40针接头附加5V电压。

J206J206

MIPI-CSI0 adaptorMIPI-CSI0 适配器

MIPI-CSI

Not Applicable for SL1620SL1620不适用。

J207J207

MIPI-CSI1 adaptorMIPI-CSI1 适配器

MIPI-CSI

Not Applicable for SL1620SL1620不适用。

J208J208

MIPI-DSI adaptorMIPI-DSI 适配器

MIPI-DSIMIPI—DSI

For MIPI-DSI x4 lane extension, like panel
用于 MIPI—DSI x4 lane 扩展,如面板。

J210

USB DeviceUSB设备

USB 3.0 x2

For USB3.0 extension in Device mode only仅适用于设备模式下的USB3.0扩展。

J213

TypeC power sourceTypeC电源

Power Supply电源

Power for Astra Machina rated at 15V/1.8AAstra Machina的额定功率为 15V/1.8A。

J215J215

USB Deviceusb设备

USB2.0 OTG

For USB2.0 extension, in either Host or Device mode
用于在主机或设备模式下的USB2.0扩展。

J216

USB DeviceUSB设备

USB 3.0 x2

For USB3.0 extension in Device mode only仅适用于设备模式下的USB3.0扩展。

Daughter Cards子卡

A set of daughter cards supplements the Astra Machina system with a variety of I/O peripheral functionalities. Perspective devices offered by different manufacturers for each of such I/O may be implemented using respective daughter card.
一套为Astra Machina系统扩展各种I/O外围功能的子卡。 不同的制造商可以使用各自的实现不同I/O功能的子卡来提供完整设备。

Debug Board调试板

Debug board (Rev5) allows users to communicate with the SL1620 system over JTAG through a debugger on a PC host. While connecting the evaluation system and debug board with a 20-pin flat cable, align pin-1 of the 2x10 cable socket at debug board side with pin-1 of 2x6 header J22 on the evaluation system.
调试板(Rev5)允许用户在PC主机上通过JTAG使用调试器与SL1620系统通信。 使用20针扁平电缆连接评估系统和调试板时,请将调试板侧2x10电缆插座的引脚1与评估系统上2x6接头J22的引脚1对齐。

Note注意

Users may communicate with SL1620 over UART on a PC host by using a low-cost UART to USB cable commonly available. See Astra Machina webpage for a qualified list. As an option, the debug board also provides such bridging function based on the Silicon Labs CP2102. A virtual COM port driver is required, and can be downloaded from the vendor website and installed in the PC host
在PC主机上,用户可以使用通用的低成本UART转USB线通过UART口与SL1620通信。 关于可用零部件清单,请参阅Astra Machina网页。 作为备选,调试板也提供了基于Silicon Labs CP2102的桥接功能。 所需的虚拟COM端口驱动程序,可从 供应商网站 下载并安装在主机上。

UART on the evaluation system and the PC host USB are digitally isolated, with no direct conductive path, eliminating ground loop and back-drive issues when either is powered down.
评估系统上的UART和PC主机的USB是数字隔离的, 无直接导电路径,消除了下电时的接地回路和back-drive问题。

Debug board connectivity for UART and JTAG shows debug board connectivity facilitating UART and JTAG communications.
调试板的UART及JTAG连接 显示了调试板上UART及JTAG通信的便利连接。

../_images/image18.png

Debug board connectivity for UART and JTAG


调试板的UART及JTAG连接

M.2 CardM.2卡

An M.2 E-Key socket J17, is provided for a variety of modules in the M.2 form factor. Typical applicable modules support WiFi/BT devices with SDIO or PCIE signal interfaces.
M.2 E—Key插座J17用于M.2 form factor的各种模块。 典型应用模块支持具有SDIO或PCIE信号接口的Wi-Fi/BT设备。

Available modules:可用模块:

  • Ampak AP12611_M2 with SYN43711 WiFi6E/BT5.3 1x1 over SDIO on M.2 adaptor
    Ampak AP12611_M2 with SYN43711 WiFi6E/BT5.3 1x1 over SDIO on M.2 adaptor

260-Pins SODIMM definition260针SODIMM定义

A 260-Pins SODIMM connector (PN: TE_2309413-1) joins the core module and the I/O board. 260-pins SODIMM definition shows the assignment for the 260-Pins.
260针SODIMM连接器(PN: TE_2309413-1)连接核心模块和I/O板。 260针SODIMM定义 显示了260针的分配。

260-pins SODIMM definition260针SODIMM定义

Assignment分配

Pin#Pin#

260-Pins SODIMM260针 SODIMM

Pin#Pin#

Assignment分配

GePHY_RSTn (From IO_Exp)GePHY_RSTn(来自IO_Exp)

2

1

n/a

SPI1_SDO && STRP[SS2]SPI1_SDO && STRP[SS2]

4

3

n/a

SPI1_SCLK && STRP[SS3]SPI1_SCLK && STRP[SS3]

6

5

n/a

LCD_RSTn (From IO_EXP)LCD_RSTn(来自IO_EXP)

8

7

n/a

n/a

10

9

n/a

SPI1_SDI

12

11

n/a

SPI1_SS0n

14

13

n/a

External_Boot_SRC0

16

15

n/a

USB-C_Logic_INTnUSB-C_Logic_INTn

18

17

n/a

SD-CARD_PPWR_EN

20

19

n/a

SD-CARD_VIO_SEL

22

21

n/a

LCD_TP_IRQ

24

23

n/a

GND

26

25

n/a

n/a

28

27

n/a

n/a

30

29

n/a

GND

32

31

n/a

n/a

34

33

n/a

n/a

36

35

n/a

GND

38

37

n/a

n/a

40

39

n/a

n/a

42

41

n/a

GND

44

43

n/a

USB2_Dn

46

45

n/a

USB2_Dp

48

47

n/a

GND

50

49

n/a

USB3_RXp

52

51

n/a

USB3_RXn

54

53

GND

GND

56

55

n/a

USB3_TXp

58

57

n/a

USB3_TXn

60

59

GND

GND

62

61

n/a

USB3_USB20.Dp

64

63

n/a

USB3_USB20.Dn

66

65

GND

GND

68

67

n/a

USB2_IDPIN

70

69

n/a

PWR_OTG_VBUS

72

71

GND

PWR_USB3_VBUS

74

73

n/a

I2S3_BCLK

76

75

n/a

I2S3_DI

78

77

GND

I2S3_DO

80

79

n/a

2S3_LRCK

82

81

n/a

I2S1_DI

84

83

GND

GPIO[22]

86

85

n/a

PDM_DI[1]PDM_DI[1]

88

87

n/a

PDM_CLKIOPDM_CLKIO

90

89

GND

TW1_SCL

92

91

n/a

TW1_SDA

94

93

n/a

GPIO-EXP_0_2

96

95

GND

FAN_TACH_ControlFAN_TACH_Control

98

97

n/a

n/a

100

99

n/a

FAN_PWM

102

101

GND

I2S1_BCLK

104

103

n/a

EXPANDER_INT-REQnEXPANDER_INT—REQn

106

105

n/a

BOOT_SRC1

108

107

GND

I2S1_DO0

110

109

n/a

I2S1_MCLK

112

111

n/a

I2S1_LRCK

114

113

GND

PWM2

116

115

MIPI_DSI_TD0n

GPIO[2]

118

117

MIPI_DSI_TD0p

URT0_TXD

120

119

GND

URT0_RXD

122

121

MIPI_DSI_TD1n

SPI2_SDI

124

123

MIPI_DSI_TD1p

SPI2_SCLK

126

125

GND

SPI2_SDO

128

127

MIPI_DSI_TCKp

SPI2_SS3n

130

129

MIPI_DSI_TCKn

USB2_OCn

132

131

GND

SPI2_SS1n

134

133

MIPI_DSI_TD3n

SPI2_SS0n

136

135

MIPI_DSI_TD3p

TW1_SDA

138

137

GND

TW1_SCL

140

139

MIPI_DSI_TD2p

n/a

142

141

MIPI_DSI_TD2n

n/a

144

143

GND

SPI2_SDO_3V3

146

145

GND

SPI2_SDI_3V3

148

147

n/a

SPI2_CLK_3V3

150

149

n/a

n/a

152

151

GND

USB-C_Logic_INTnUSB-C_Logic_INTn

154

153

n/a

n/a

156

155

n/a

n/a

158

157

GND

Levershift_EN# for 40P headerLevershift_EN# 用于40P接头

160

159

n/a

n/a

162

161

n/a

RSTIn@PU

164

163

GND

JTAG_TDO

166

165

n/a

JTAG_TDI.SoC_WakeUp#JTAG_TDI.SoC_WakeUp#

168

167

n/a

JTAG_TMS

170

169

GND

n/a

172

171

n/a

n/a

174

173

n/a

GPIO[48]GPIO[48]

176

175

GND

TW2_SDA

178

177

n/a

TW2_SCL

180

179

JTAG_TCK

TW0_SDA

182

181

GPIO[47]

TW0_SCL

184

183

JTAG_TRSTn

URT1A_CTSn for M.2URT1A_CTSn,用于M.2

186

185

GPIO-EXP_0_7GPIO—EXP_0_7

URT1A_RTSn for M.2URT1A_RTSn,用于M.2

188

187

URT1A_RXD for M.2URT1A_RXD,用于M.2

PWM1

190

189

GPIO[55]

GND

192

191

URT1A_TXD for M.2URT1A_TXD,用于M.2

PWR_1V8

194

193

n/a

PWR_1V8

196

195

n/a

PWR_1V8_CTL

198

197

n/a

PWR_1V8_CTL

200

199

n/a

PWR_3V3_CTL

202

201

n/a

PWR_3V3_CTL

204

203

n/a

GND

206

205

USB_BOOTnUSB_BOOTn

M.2_WIFI_SDIO_CLK

208

207

SDIO_MUX_SEL (From IO_EXP)SDIO_MUX_SEL(来自IO_EXP)

GND

210

209

ETHERNET_LINK_LED

M.2_WIFI_SDIO_CMD

212

211

ETHERNET_DUPLX_LEDETHERNET_DUPLX_LED

GND

214

213

GND

M.2_WIFI_SDIO_D0

216

215

RJ45_MDIP0

GND

218

217

RJ45_MDIN0

M.2_WIFI_SDIO_D1

220

219

GND

GND

222

221

RJ45_MDIP1

M.2_WIFI_SDIO_D2

224

223

RJ45_MDIN1

GND

226

225

GND

M.2_WIFI_SDIO_D3

228

227

RJ45_MDIP2

GND

230

229

RJ45_MDIN2

PWR_3V3

232

231

GND

PWR_3V3

234

233

RJ45_MDIP3

PWR_3V3

236

235

RJ45_MDIN3

PWR_3V3

238

237

GND

PWR_3V3

240

239

PWR_BL for LCD backlightPWR_BL,用于LCD背光

PWR_3V3

242

241

PWR_BL for LCD backlightPWR_BL,用于LCD背光

GND

244

243

GND

GND

246

245

GND

GND

248

247

GND

GND

250

249

GND

PWR_5V

252

251

PWR_5V

PWR_5V

254

253

PWR_5V

PWR_5V

256

255

PWR_5V

PWR_5V

258

257

PWR_5V

PWR_5V

260

259

PWR_5V

40-Pins Header40针接头

A 40-pin GPIO header with 0.1-inch (2.54mm) pin pitch is on the top edge of the I/O board. Any of the general-purpose 3.3V pins can be configured in software with a variety of alternative functions. For more information, please refer to the SL1620 Datasheet.
40针GPIO接头, 引脚间距为0.1英寸(2.54mm),位于I/O板正面的边缘。 任何通用3.3V引脚的各种可选功能都可通过软件配置。 详情请参阅 SL1620 Datasheet

../_images/image19.png

40-pin header definition


40针接头定义

Pin-demuxing for Standard Interface Configuration标准接口配置的引脚解复用

This section covers pin-demuxing configuration for the SL1620 evaluation system. For System on Chip (SoC), see SoC pin-demuxing usage.
本节介绍SL1620评估系统的引脚解复用配置。 关于片上系统(SoC),请参阅 SoC引脚解复用用法

SoC pin-demuxing usageSoC引脚解复用用法

SL1620 System-on-chip (SoC) DomainSL1620片上系统(SoC)Domain

Pad/Pin NamePad/Pin 名称

Default Usage缺省用法

Direction方向

Mode Setting模式设置

SDIO

SDIO_CDn

I:SDIOA_CDnI:SDIOA_CDn

ININ

MODE_1MODE_1

SDIO_WP

IO:GPIO[55]IO:GPIO[55]

IN/OUT

MODE_0MODE_0

SPI1

SPI1_SS0n

O:SPI1_SS0nO:SPI1_SS0n

OUTOUT

MODE_0MODE_0

SPI1_SS1n

IO:GPIO[4]IO:GPIO[4]

ININ

MODE_2MODE_2

SPI1_SS2n

I:URT0A_RXDI:URT0A_RXD

ININ

MODE_0MODE_0

SPI1_SS3n

O:URT0A_TXDO:URT0A_TXD

OUTOUT

MODE_0MODE_0

SPI1_SDO

O:SPI1_SDOO:SPI1_SDO

OUTOUT

MODE_0MODE_0

SPI1_SDI

I:SPI1_SDII:SPI1_SDI

ININ

MODE_0MODE_0

SPI1_SCLK

O:SPI1_SCLKO:SPI1_SCLK

OUTOUT

MODE_0MODE_0

SPI2

SPI2_SS0n

O:SPI2_SS0nO:SPI2_SS0n

OUTOUT

MODE_1MODE_1

SPI2_SS1n

O:SPI2_SS1nO:SPI2_SS1n

OUTOUT

MODE_1MODE_1

SPI2_SS2n

O:SPI2_SS2nO:SPI2_SS2n

OUTOUT

MODE_2MODE_2

SPI2_SS3n

O:SPI2_SS3nO:SPI2_SS3n

OUTOUT

MODE_2MODE_2

SPI2_SDO

O:SPI2_SDOO:SPI2_SDO

OUTOUT

MODE_1MODE_1

SPI2_SDI

I:SPI2_SDII:SPI2_SDI

ININ

MODE_1MODE_1

SPI2_SCLK

O:SPI2_SCLKO:SPI2_SCLK

OUTOUT

MODE_1MODE_1

UART

URT1_RXD

I:URT1A_RXDI:URT1A_RXD

ININ

MODE_2MODE_2

URT1_TXD

O:URT1A_TXDO:URT1A_TXD

OUTOUT

MODE_2MODE_2

TWSI

TW0_SCL

IO:TW0A_SCLIO:TW0A_SCL

OUTOUT

MODE_0MODE_0

TW0_SDA

IO:TW0A_SDAIO:TW0A_SDA

IN/OUT

MODE_0MODE_0

TW1_SCL

IO:TW1_SCLIO:TW1_SCL

OUTOUT

MODE_0MODE_0

TW1_SDA

IO:TW1_SDAIO:TW1_SDA

IN/OUTIN/OUT

MODE_0MODE_0

TW2_SCL

IO:TW2_SCLIO:TW2_SCL

OUTOUT

MODE_1MODE_1

TW2_SDA

IO:TW2_SDAIO:TW2_SDA

IN/OUT

MODE_1MODE_1

TW3_SCL

O:URT1A_RTSnO:URT1A_RTSn

OUTOUT

MODE_2MODE_2

TW3_SDA

I:URT1A_CTSnI:URT1A_CTSn

ININ

MODE_2MODE_2

USB2

USB2_DRV_VBUS

O:GPIO[51]O:GPIO[51]

OUTOUT

MODE_1MODE_1

PWM

PWM[0]

O:PWM[0]O:PWM[0]

OUTOUT

MODE_1MODE_1

PWM[1]

O:PWM[1]O:PWM[1]

OUTOUT

MODE_1MODE_1

PWM[2]

O:PWM[2]O:PWM[2]

OUTOUT

MODE_1MODE_1

PWM[3]

O:PWM[3]O:PWM[3]

OUTOUT

MODE_1MODE_1

RGMII

RGMII_TXC

O:RGMII_TXCO:RGMII_TXC

OUTOUT

MODE_1MODE_1

RGMII_TXD[0]RGMII_TXD[0]

O:RGMII_TXD[0]O:RGMII_TXD[0]

OUTOUT

MODE_1MODE_1

RGMII_TXD[1]RGMII_TXD[1]

O:RGMII_TXD[1]O:RGMII_TXD[1]

OUTOUT

MODE_1MODE_1

RGMII_TXD[2]

O:RGMII_TXD[2]O:RGMII_TXD[2]

OUTOUT

MODE_1MODE_1

RGMII_TXD[3]

O:RGMII_TXD[3]O:RGMII_TXD[3]

OUTOUT

MODE_1MODE_1

RGMII_TXCTL

O:RGMII_TXCTLO:RGMII_TXCTL

OUTOUT

MODE_1MODE_1

RGMII_RXC

I:RGMII_RXCI:RGMII_RXC

ININ

MODE_1MODE_1

RGMII_RXD[0]

I:RGMII_RXD[0]I:RGMII_RXD[0]

ININ

MODE_1MODE_1

RGMII_RXD[1]RGMII_RXD[1]

I:RGMII_RXD[1]I:RGMII_RXD[1]

ININ

MODE_1MODE_1

RGMII_RXD[2]

I:RGMII_RXD[2]I:RGMII_RXD[2]

ININ

MODE_1MODE_1

RGMII_RXD[3]RGMII_RXD[3]

I:RGMII_RXD[3]I:RGMII_RXD[3]

ININ

MODE_1MODE_1

RGMII_RXCTL

I:RGMII_RXCTLI:RGMII_RXCTL

ININ

MODE_1MODE_1

I2S1I2S1

I2S1_DO

O:I2S1_DOO:I2S1_DO

OUTOUT

MODE_1MODE_1

I2S1_DI

I:I2S1_DII:I2S1_DI

ININ

MODE_1MODE_1

I2S1_LRCK

IO:I2S1_LRCKIO:I2S1_LRCK

IN/OUT

MODE_1MODE_1

I2S1_BCLK

IO:I2S1_BCLKIO:I2S1_BCLK

IN/OUTIN/OUT

MODE_1MODE_1

I2S1_MCLK

IO:I2S1_MCLKIO:I2S1_MCLK

OUTOUT

MODE_1MODE_1

I2S2

I2S2_DO

O:I2S2_DOO:I2S2_DO

OUTOUT

MODE_1MODE_1

I2S2_DI

IO:GPIO[22]IO:GPIO[22]

IN/OUT

MODE_0MODE_0

I2S2_LRCK

IO:I2S2_LRCKIO:I2S2_LRCK

IN/OUT

MODE_1MODE_1

I2S2_BCLK

IO:I2S2_BCLKIO:I2S2_BCLK

IN/OUT

MODE_1MODE_1

I2S3

I2S3_DO

O:I2S3_DOO:I2S3_DO

OUTOUT

MODE_1MODE_1

I2S3_DI

I:I2S3_DII:I2S3_DI

ININ

MODE_1MODE_1

I2S3_LRCK

IO:I2S3_LRCKIO:I2S3_LRCK

IN/OUT

MODE_1MODE_1

I2S3_BCLK

IO:I2S3_BCLKIO:I2S3_BCLK

IN/OUTIN/OUT

MODE_1MODE_1

PDM

PDM_CLKIOPDM_CLKIO

IO:PDM_CLKIOIO:PDM_CLKIO

OUTOUT

MODE_1MODE_1

PDM_DI[0]PDM_DI[0]

I:PDM_DI[0]I:PDM_DI[0]

ININ

MODE_1MODE_1

PDM_DI[1]PDM_DI[1]

I:PDM_DI[1]I:PDM_DI[1]

ININ

MODE_1MODE_1

JTAG

TMS

IO:GPIO[0]IO:GPIO[0]

ININ

MODE_1MODE_1

TDI

IO:GPIO[1]IO:GPIO[1]

ININ

MODE_1MODE_1

TDO

IO:GPIO[2]IO:GPIO[2]

IN/OUTIN/OUT

MODE_1MODE_1

GPIO_A

GPIO_A[0]GPIO_A[0]

IO:RGMIIA_MDIOIO:RGMIIA_MDIO

IN/OUT

MODE_1MODE_1

GPIO_A[1]

O:RGMIIA_MDCO:RGMIIA_MDC

OUTOUT

MODE_1MODE_1

GPIO_A[2]

IO:GPIO[48]IO:GPIO[48]

IN/OUTIN/OUT

MODE_0MODE_0

GPIO_A[3]

IO:GPIO[47]IO:GPIO[47]

IN/OUT

MODE_0MODE_0

NAND

NFALE

O:NFALEO:NFALE

OUTOUT

MODE_1MODE_1

NFLCS

O:NFLCSO:NFLCS

OUTOUT

MODE_1MODE_1

LCDC

LCDD0

IO:LCDD0IO:LCDD0

IN/OUTIN/OUT

MODE_1MODE_1

LCDD1

IO:LCDD1IO:LCDD1

IN/OUT

MODE_1MODE_1

LCDD2

IO:LCDD2IO:LCDD2

IN/OUT

MODE_1MODE_1

LCDD3

IO:LCDD3IO:LCDD3

IN/OUT

MODE_1MODE_1

LCDD4

IO:LCDD4IO:LCDD4

IN/OUT

MODE_1MODE_1

LCDD5

IO:LCDD5IO:LCDD5

IN/OUT

MODE_1MODE_1

LCDD6

IO:LCDD6IO:LCDD6

IN/OUT

MODE_1MODE_1

LCDD7

IO:LCDD7IO:LCDD7

IN/OUT

MODE_1MODE_1

LCDD8

IO:LCDD8IO:LCDD8

IN/OUT

MODE_1MODE_1

LCDD9

IO:LCDD9IO:LCDD9

IN/OUT

MODE_1MODE_1

LCDD10

IO:LCDD10IO:LCDD10

IN/OUT

MODE_1MODE_1

LCDD11LCDD11

IO:LCDD11IO:LCDD11

IN/OUT

MODE_1MODE_1

LCDD12

IO:LCDD12IO:LCDD12

IN/OUT

MODE_1MODE_1

LCDD13

IO:LCDD13IO:LCDD13

IN/OUT

MODE_1MODE_1

LCDD14LCD14

IO:LCDD14IO:LCDD14

IN/OUT

MODE_1MODE_1

LCDD15LCD15

IO:LCDD15IO:LCDD15

IN/OUT

MODE_1MODE_1

LCDD16LCD16

IO:LCDD16IO:LCDD16

IN/OUT

MODE_1MODE_1

LCDD17

IO:LCDD17IO:LCDD17

IN/OUT

MODE_1MODE_1

LCDD18

IO:LCDD18IO:LCDD18

IN/OUT

MODE_1MODE_1

LCDD19

IO:LCDD19IO:LCDD19

IN/OUT

MODE_1MODE_1

LCDD20

IO:LCDD20IO:LCDD20

IN/OUT

MODE_1MODE_1

LCDD21

IO:LCDD21IO:LCDD21

IN/OUT

MODE_1MODE_1

LCDD22

IO:LCDD22IO:LCDD22

IN/OUT

MODE_1MODE_1

LCDD23

IO:LCDD23IO:LCDD23

IN/OUT

MODE_1MODE_1

LPCLK

O:LPCLKO:LPCLK

OUTOUT

MODE_1MODE_1

LCDGPIO0LCDGPIO0

O:LCDGPIO0O:LCDGPIO0

OUTOUT

MODE_1MODE_1

LCDGPIO1LCDGPIO1

O:LCDGPIO1O:LCDGPIO1

OUTOUT

MODE_1MODE_1

LCDGPIO2LCDGPIO2

O:LCDGPIO2O:LCDGPIO2

OUTOUT

MODE_1MODE_1

LCDGPIO3LCDGPIO3

O:LCDGPIO3O:LCDGPIO3

OUTOUT

MODE_1MODE_1

Pin-demuxing for GPIO/GPO ConfigurationGPIO/GPO配置的引脚解复用

This section covers pin-demuxed GPIO/GPO usage of SoC domains.
本节介绍SoC域的引脚解复用GPIO/GPO用法。

SoC GPIO/GPO usageSoC GPIO/GPO用法

SL1620 SoC

Availability可用性

Direction方向

Default Function默认功能

GPIO SignalingGPIO 信号

GPIO/GPOGPIO/GPO

GPIO[0]GPIO[0]

MODE_1MODE_1

ININ

GPIO_EXP_INTn (CM)GPIO_EXP_INTn(CM)

0: GPIO Expander triggers interrupt (Core Module)
0:GPIO扩展器触发中断(核心模块)

1: No interrupt1:无中断

GPIO_X[0]GPIO_X[0]

Not Available不可用

IN/OUT

IO:LCDD8IO:LCDD8

GPIO[1]GPIO[1]

MODE_1MODE_1

ININ

WiFi_WAKE_UP#

0: Wake up triggered by WiFi0:由WiFi触发的唤醒

1: No wake up trigger1:无唤醒触发

GPIO_X[1]

Not Available不可用

IN/OUT

IO:LCDD9IO:LCDD9

GPIO[2]

MODE_1MODE_1

IN/OUT

IO:LCDD16IO:LCDD16

To 40-Pin header至40针接头

GPIO_X[2]

Not Available不可用

IN/OUT

O:SM_FE_LED[0]O:SM_FE_LED[0]

GPIO[3]

Not Available不可用

OUTOUT

O:SPI1_SS0nO:SPI1_SS0n

GPIO[4]

MODE_2MODE_2

ININ

GPIO_EXP_INTn

(I/O Board)


GPIO_EXP_INTn

(I/O板)

0: GPIO Expander triggers interrupt (I/O Board)
0:GPIO扩展器触发中断(I/O板)

1: No interrupt1:无中断

GPIO[5]GPIO[5]

MODE_0MODE_0

ININ

I:URT0A_RXDI:URT0A_RXD

To 40-Pin header至40针接头

GPIO[6]GPIO[6]

MODE_0MODE_0

OUTOUT

O:URT0A_TXDO:URT0A_TXD

To 40-Pin header至40针接头

GPO[7]GPO[7]

Not Available不可用

OUTOUT

O:SPI1_SDOO:SPI1_SDO

GPO[8]GPO[8]

Not Available不可用

OUTOUT

O:SPI1_SCLKO:SPI1_SCLK

GPIO[9]GPIO[9]

Not Available不可用

ININ

I:SPI1_SDII:SPI1_SDI

GPIO[10]

MODE_0MODE_0

OUTOUT

IO:TW0A_SCLIO:TW0A_SCL

To 40-Pin Header/ Display IF/ GPIO_EXP_CM
至 40针接头 / Display IF/ GPIO_EXP_CM

GPIO_X[10]

Not Available不可用

IN/OUT

O:LCDGPIO3O:LCDGPIO3

GPIO[11]

MODE 0MODE 0

IN/OUT

IO:TW0A_SDAIO:TW0A_SDA

To 40-Pin Header/ Display IF/ GPIO_EXP_CM
至 40针接头 / Display IF/ GPIO_EXP_CM

GPIO_X[11]

MODE 0MODE 0

ININ

GePHY_INTB

0: Interrupt is triggered by GePHY0:由GePHY触发的中断

1: No interrupt1:无中断

GPIO[12]GPIO[12]

MODE_0MODE_0

OUTOUT

IO:TW1_SCLIO:TW1_SCL

To 40-Pin Header/ M.2/ GPIO_EXP_IO至 40针接头/ M.2/ GPIO_EXP_IO

GPIO_X[12]

Not Available不可用

IN/OUT

IO:LCDD0IO:LCDD0

GPIO[13]

MODE_0MODE_0

IN/OUT

IO:TW1_SDAIO:TW1_SDA

To 40-Pin Header/ M.2/ GPIO_EXP_IO至 40针接头/ M.2/ GPIO_EXP_IO

GPIO_X[13]

Not Available不可用

IN/OUT

IO:LCDD1IO:LCDD1

GPIO[14]

MODE_1MODE_1

OUTOUT

IO:I2S1_LRCKIO:I2S1_LRCK

To 40-Pin Header至40针接头

GPIO_X[14]GPIO_X[14]

Not Available不可用

IN/OUT

IO:LCDD23IO:LCDD23

GPIO[15]

MODE_1MODE_1

OUTOUT

IO:I2S1_BCLKIO:I2S1_BCLK

To 40-Pin Header至40针接头

GPIO_X[15]

Not Available不可用

OUTOUT

O:LPCLKO:LPCLK

GPO[16]GPO[16]

MODE_1MODE_1

OUTOUT

O:I2S1_DOO:I2S1_DO

To 40-Pin Header至40针接头

GPIO_X[16]

Not Available不可用

OUTOUT

O:LCDGPIO0O:LCDGPIO0

GPIO[17]

MODE_1MODE_1

OUTOUT

IO:I2S1_MCLKIO:I2S1_MCLK

To 40-Pin Header至40针接头

GPIO_X[17]

Not Available不可用

OUTOUT

O:LCDGPIO1O:LCDGPIO1

GPIO[18]GPIO[18]

MODE_1MODE_1

ININ

I:I2S1_DII:I2S1_DI

To 40-Pin Header至40针接头

GPIO_X[18]

Not Available不可用

OUTOUT

O:LCDGPIO2O:LCDGPIO2

GPIO[19]

Not Available不可用

OUTOUT

IO:I2S2_LRCKIO:I2S2_LRCK

GPIO_X[19]

Not Available不可用

OUTOUT

O:RGMII_TXD[0]O:RGMII_TXD[0]

GPIO[20]

Not Available不可用

OUTOUT

IO:I2S2_BCLKIO:I2S2_BCLK

GPIO_X[20]

Not Available不可用

OUTOUT

O:RGMII_TXD[1]O:RGMII_TXD[1]

GPO[21]GPO[21]

Not Available不可用

OUTOUT

O:I2S2_DOO:I2S2_DO

GPIO_X[21]

Not Available不可用

OUTOUT

O:RGMII_TXD[2]O:RGMII_TXD[2]

GPIO[22]

MODE_0MODE_0

IN/OUT

IO:GPIO[22]IO:GPIO[22]

To 40-Pin Header至40针接头

GPIO_X[22]

Not Available不可用

OUTOUT

O:RGMII_TXD[3]O:RGMII_TXD[3]

GPIO[23]

MODE_1MODE_1

ININ

I:PDM_DI[1]I:PDM_DI[1]

To 40-Pin Header至40针接头

GPIO[24]GPIO[24]

Not Available不可用

ININ

I:PDM_DI[0]I:PDM_DI[0]

GPIO[25]

MODE_1MODE_1

OUTOUT

IO:PDM_CLKIOIO:PDM_CLKIO

To 40-Pin Header/ DMIC on Board至板载 40针接头 / DMIC

GPIO[26]

Not Available不可用

OUTOUT

IO:I2S3_LRCKIO:I2S3_LRCK

GPIO[27]

Not Available不可用

OUTOUT

IO:I2S3_BCLKIO:I2S3_BCLK

GPO[28]GPO[28]

Not Available不可用

OUTOUT

O:I2S3_DOO:I2S3_DO

GPIO[29]GPIO[29]

Not Available不可用

ININ

I:I2S3_DII:I2S3_DI

GPO[30]GPO[30]

MODE_1MODE_1

OUTOUT

O:SPI2_SS0nO:SPI2_SS0n

To 40-Pin Header至40针接头

GPIO[31]

MODE_1MODE_1

OUTOUT

O:SPI2_SS1nO:SPI2_SS1n

To 40-Pin Header至40针接头

GPIO_X[31]

Not Available不可用

ININ

I:RGMII_RXD[0]I:RGMII_RXD[0]

GPIO[32]

Not Available不可用

OUTOUT

O:SPI2_SS2nO:SPI2_SS2n

GPIO_X[32]

Not Available不可用

ININ

I:RGMII_RXD[1]I:RGMII_RXD[1]

GPIO[33]

MODE_2MODE_2

OUTOUT

O:SPI2_SS3nO:SPI2_SS3n

To 40-Pin Header至40针接头

GPIO_X[33]GPIO_X[33]

Not Available不可用

ININ

I:RGMII_RXD[2]I:RGMII_RXD[2]

GPO[34]GPO[34]

MODE_1MODE_1

OUTOUT

O:SPI2_SDOO:SPI2_SDO

To 40-Pin Header/ LCDC至 40-Pin Header / LCDC

GPO[35]GPO[35]

MODE_1MODE_1

OUTOUT

O:SPI2_SCLKO:SPI2_SCLK

To 40-Pin Header/ LCDC至 40-Pin Header / LCDC

GPIO[36]GPIO[36]

MODE_1MODE_1

ININ

I:SPI2_SDII:SPI2_SDI

To 40-Pin Header/ LCDC至 40-Pin Header / LCDC

GPIO[37]

Not Available不可用

OUTOUT

IO:TW2_SCLIO:TW2_SCL

GPIO[38]GPIO[38]

Not Available不可用

IN/OUT

IO:TW2_SDAIO:TW2_SDA

GPIO[39]

Not Available不可用

ININ

I:URT1A_RXDI:URT1A_RXD

GPIO_X[39]

Not Available不可用

IN/OUT

IO:LCDD17IO:LCDD17

GPIO[40]

Not Available不可用

OUTOUT

O:URT1A_TXDO:URT1A_TXD

GPIO_X[40]

Not Available不可用

IN/OUT

IO:LCDD22IO:LCDD22

GPIO[41]GPIO[41]

Not Available不可用

OUTOUT

O:URT1A_RTSnO:URT1A_RTSn

GPIO_X[41]

Not Available不可用

ININ

I:RGMII_RXD[3]I:RGMII_RXD[3]

GPIO[42]

Not Available不可用

ININ

I:URT1A_CTSnI:URT1A_CTSn

GPIO_X[42]

Not Available不可用

ININ

I:RGMII_RXCI:RGMII_RXC

GPIO[43]

Not Available不可用

OUTOUT

O:PWM[3]O:PWM[3]

GPIO_X[43]GPIO_X[43]

Not Available不可用

OUTOUT

O:RGMII_TXCO:RGMII_TXC

GPIO[44]

MODE_1MODE_1

OUTOUT

O:PWM[2]O:PWM[2]

To 40-Pin Header至40针接头

GPIO[45]

MODE_1MODE_1

OUTOUT

O:PWM[1]O:PWM[1]

To 40-Pin Header至40针接头

GPO[46]GPO[46]

Not Available不可用

OUTOUT

O:PWM[0]O:PWM[0]

GPIO[47]

MODE_0MODE_0

IN/OUT

IO:GPIO[47]IO:GPIO[47]

To 40-Pin Header至40针接头

GPIO[48]GPIO[48]

MODE_0MODE_0

IN/OUT

IO:GPIO[48]IO:GPIO[48]

To 40-Pin Header至40针接头

GPIO[49]

Not Available不可用

OUTOUT

O:RGMIIA_MDCO:RGMIIA_MDC

GPIO[50]

Not Available不可用

IN/OUT

IO:RGMIIA_MDIOIO:RGMIIA_MDIO

GPIO[51]

MODE_1MODE_1

OUTOUT

Audio_MuteAudio_Mute

0: Mute0:静音

1: un-Mute1:取消静音

GPIO_X[51]

Not Available不可用

OUTOUT

O:RGMII_TXCTLO:RGMII_TXCTL

GPIO[52]

Not Available不可用

OUTOUT

O:NFALEO:NFALE

GPIO_X[52]

Not Available不可用

ININ

I:RGMII_RXCTLI:RGMII_RXCTL

GPIO[53]GPIO[53]

Not Available不可用

OUTOUT

O:NFLCSO:NFLCS

GPIO_X[53]

Not Available不可用

ININ

O:RGMII_CLK_OUTO:RGMII_CLK_OUT

GPO[54]GPO[54]

Not Available不可用

ININ

I:SDIOA_CDnI:SDIOA_CDn

GPIO[55]

MODE_0MODE_0

IN/OUT

IO:GPIO[55]IO:GPIO[55]

To 40-Pin Header至40针接头

GPIO[56]

Not Available不可用

IN/OUT

IO:LCDD2IO:LCDD2

GPIO[57]

Not Available不可用

IN/OUT

IO:LCDD3IO:LCDD3

GPIO[58]

Not Available不可用

IN/OUT

IO:LCDD4IO:LCDD4

GPIO[59]

Not Available不可用

IN/OUT

IO:LCDD5IO:LCDD5

GPIO[60]GPIO[60]

Not Available不可用

IN/OUT

IO:LCDD6IO:LCDD6

GPIO[61]

Not Available不可用

IN/OUT

IO:LCDD7IO:LCDD7

GPIO[62]GPIO[62]

Not Available不可用

IN/OUT

IO:LCDD10IO:LCDD10

GPIO[63]

Not Available不可用

IN/OUT

IO:LCDD11IO:LCDD11

GPIO[64]

Not Available不可用

IN/OUT

IO:LCDD12IO:LCDD12

GPIO[65]

Not Available不可用

IN/OUT

IO:LCDD13IO:LCDD13

GPIO[66]GPIO[66]

Not Available不可用

IN/OUT

IO:LCDD14IO:LCDD14

GPIO[67]GPIO[67]

Not Available不可用

IN/OUT

IO:LCDD15IO:LCDD15

GPIO[68]

Not Available不可用

IN/OUT

IO:LCDD18IO:LCDD18

GPIO[69]

Not Available不可用

IN/OUT

IO:LCDD19IO:LCDD19

GPIO[70]

Not Available不可用

IN/OUT

IO:LCDD20IO:LCDD20

GPIO[71]

Not Available不可用

IN/OUT

IO:LCDD21IO:LCDD21

GPIO Expanders Over I2C通过I2C的GPIO扩展器

Due to the considerable number of functionalities covered by the SL1620 evaluation system, most of the SL1620 digital pins that have GPIO/GPO pin-demux options are used for other functions. As such, GPIO expanders are used extensively to supplement system control purposes.
由于SL1620评估系统涵盖了相当多的功能, 大多数具备GPIO/GPO复用功能选项的SL1620数字引脚都可用于其他功能。因此,GPIO扩展器被广泛应用于扩充系统控制。

GPIO expanders usageGPIO扩展器用法

Expander扩展器

I2C#I2C#

DomainDomain

Voltage电压

Direction方向

Function功能

GPIO SignalingGPIO 信号

GPIO/GPOGPIO/GPO

GPIO0_0

TW1 (0x43)TW1(0x43)

SoC

3.3V

OUTOUT

SDIO-MUX_SELSDIO—MUX_SEL

0: Switch SDIO to M.2 WiFi0:将SDIO切换到M.2 WiFi

1: Switch SDIO to SD Card Slot1:将SDIO切换到SD卡插槽

GPIO0_1GPIO0_1

TW1 (0x43)TW1(0x43)

SoC

3.3V

OUTOUT

PWR_ON_DSI

0: Power OFF DSI panel0:DSI面板下电

1: Power ON DSI panel1:DSI面板上电

GPIO0_2

TW1 (0x43)TW1(0x43)

SoC

3.3V

OUTOUT

LCD_RST#LCD_RST#

0: Reset LCD0:复位LCD

1: De-assert Reset1:De-assert Reset

GPIO0_3

TW1 (0x43)TW1(0x43)

SoC

3.3V

OUTOUT

GePHY_RST#GePHY_RST#

0: Reset0:复位

1: De-assert Reset1:De-assert Reset

GPIO0_4

TW1 (0x43)TW1(0x43)

SoC

3.3V

OUTOUT

STAND-BY_ENSTAND-BY_EN

0: Normal playback0:正常播放

1: Entry to Stand-By status with peripherals Powered down
1:进入待机状态且外设下电

GPIO0_5

TW1 (0x43)TW1(0x43)

SoC

3.3V

ININ

USB2.0_PWR_EN

0: Power OFF0:下电

1: Power ON1:上电

GPIO0_6

TW1 (0x43)TW1(0x43)

SoC

3.3V

ININ

Not used未使用

-

-

GPIO0_7

TW1 (0x43)TW1(0x43)

SoC

3.3V

IN/OUT

GPIO_DSI

In reserved保留

In reserved保留

GPIO1_0

TW1 (0x44)TW1(0x44)

SoC

3.3V

ININ

USB-C_Logic_INT#

0: Status changed0:状态已更改

1: Status not changed1:状态未更改

GPIO1_1

TW1 (0x44)TW1(0x44)

SoC

3.3V

OUTOUT

Not used未使用

-

-

GPIO1_2

TW1 (0x44)TW1(0x44)

SoC

3.3V

OUTOUT

M2-W_DISABLE1#M2—W_DISABLE1#

0: Disable M.2 module by DISABLE1#0:通过 DISABLE1# 禁用 M.2 模块

1: De-assertion1:De-assertion

GPIO1_3

TW1 (0x44)TW1(0x44)

SoC

3.3V

OUTOUT

M2-W_HOST-WAKE#M2-W_HOST-WAKE#

0: Assertion Wake-up event from Host to M.2 module
0:从主机向 M.2模块 发出唤醒事件

1: De-assertion1:De-assertion

GPIO1_4

TW1 (0x44)TW1(0x44)

SoC

3.3V

OUTOUT

SD-CARD_PWR_ENSD—CARD_PWR_EN

0: Power OFF SD card slot0:SD卡插槽下电

1: Power ON SD card slot1:SD卡插槽上电

GPIO1_5

TW1 (0x44)TW1(0x44)

SoC

3.3V

OUTOUT

M2-W_DISABLE2#

0: Disable M.2 module by DISABLE2#0:通过 DISABLE2# 禁用 M.2 模块

1: De-assertion1:De-assertion

GPIO1_6

TW1 (0x44)TW1(0x44)

SoC

3.3V

OUTOUT

SD-CARD_VIO_SEL

0: 1.8V0:1.8V

1: 3.3V1:3.3V

GPIO1_7

TW1 (0x44)TW1(0x44)

SoC

3.3V

OUTOUT

LCD_TP_IRQ#

0: Interrupt is triggered0:中断被触发

1: No interrupt1:无中断

GPIO0_0

TW0 (0x43)TW0(0x43)

SoC

1.8V

ININ

FAN_TECH_CON

0: Fan gets Error0:风扇出错

1: No interrupt1:无中断

GPIO0_1GPIO0_1

TW0 (0x43)TW0(0x43)

SoC

1.8V

ININ

AUD_JACK_DET

0: Audio Jack exist0:音频插孔在位

1: No Audio Jack1:音频插孔不在位

GPIO0_2

TW0 (0x43)TW0(0x43)

SoC

1.8V

IN/OUT

GPIO_0_2

(40-Pin Header)


GPIO_0_2

(40针接头)

0: Depends on user definition0:取决于用户定义

1: Depends on user definition1:取决于用户定义

GPIO0_3

TW0 (0x43)TW0(0x43)

SoC

1.8V

OUTOUT

NAND_WP#NAND_WP#

0: Write protection0:写保护

1: Write accessible1:可写

GPIO0_4

TW0 (0x43)TW0(0x43)

SoC

1.8V

OUTOUT

DMIC_MUTE#DMIC_MUTE#

0: Mute DMIC0:DMIC 静音

1: De-Mute DMIC1:DMIC 解除静音

GPIO0_5

TW0 (0x43)TW0(0x43)

SoC

1.8V

OUTOUT

LevelTranslator_EN#

0: Enable Level translator0:使能电平转换器

1: Disable Level translator1:禁用电平转换器

GPIO0_6

TW0 (0x43)TW0(0x43)

SoC

1.8V

ININ

USB2_CONN_OC#USB2_USB_OC#

0: Detect USB2 Over-Current0:检测到 USB2 过流

1: Normal status1:正常状态

GPIO0_7

TW0 (0x43)TW0(0x43)

SoC

1.8V

IN/OUT

GPIO_0_7

(40-Pin Header)


GPIO_0_7

(40针接头)

0: Depends on user definition0:取决于用户定义

1: Depends on user definition1:取决于用户定义

I2C BusI2C总线

This section describes the Astra Machina’s usage of the I2C bus, the equivalence of SL1620’s Two Wire Serial Interface (TWSI) bus.
本节介绍Astra Machina I2C 总线的用法,等价于SL1620的Two Wire Serial Interface(TWSI)总线。

I2C bus descriptionsI2C总线描述

II2C/TWSI BusC/TWSI总线

Device设备

Part Number器件编号

Ref Des

Target Address目标地址

(7-bit)(7位)

Location位置

TW0

External device connects to MIPI_DSI connector
外部设备连接到MIPI_DSI连接器

Not applicable不适用

J208J208

0xXX0xxx

SL16x0 I/O boardSL16x0 I/O 板

External device connects to 40-pin Header
外部设备连接到40针接头

Not applicable不适用

J32

0xXX

SL16x0 I/O boardSL16x0 I/O 板

External device connects to LCD connector
外部设备连接到LCD连接器

Not applicable不适用

J35

0xXX

SL1620

core module


SL1620

Core Module核心模块

IC GPIO Expander

FXL6408UMXFXL6408UMX

U8

0x43

SL1620

core module


SL1620

Core Module核心模块

TW1

IC GPIO Expander

FXL6408UMXFXL6408UMX

U12u12

0x43

SL16x0 I/O boardSL16x0 I/O 板

IC GPIO Expander

FXL6408UMXFXL6408UMX

U13

0x44

SL16x0 I/O boardSL16x0 I/O 板

External device connects to 40-pin Header
外部设备连接到40针接头

Not applicable不适用

J32

0xXX

SL16x0 I/O boardSL16x0 I/O 板

TW2

IC REG, default 0.8V Vout /5mV Step, 6A rating, Input 5.5V@Max, Step-Down Convertor with I2C
IC REG,缺省0.8V Vout /5mV步进,6A额定值,输入 5.5V@Max,带I2C的降压转换器

TPS628660AYCG

U39u39

0x49

SL1620 core moduleSL1620核心模块

Bringing Up the SL1620 Astra Machina System 点亮SL1620 Astra Machina系统

Connecting External Components and Performing Hardware Testing 连接外部组件并执行硬件测试

Perform the following steps to connect the external components to SL1620 evaluation system:
执行以下步骤, 将外部组件连接到SL1620评估系统:

  1. Connect a TypeC power supply to J213 (PWR_IN).
    将TypeC电源连接到J213(PWR_IN)。

  2. Connect MIPI_DSI daughter board with Panel through FPC cable to J208.
    通过FPC电缆将MIPI_DSI子板与面板连接到J208。

  1. Connect Network to J2 (RJ45) with an Ethernet cable.
    使用以太网线将网络连接到J2(RJ45)。

  2. Insert USB3.0 flash disk to J216 /J210 (USB3.0).
    将USB3.0闪存盘插入J216/J210(USB3.0)。

  3. Insert USB2.0 flash disk to J215 (USB2.0) over TypeC/TypeA dongle.
    通过TypeC/TypeA转换器将USB2.0闪存盘插入J215(USB2.0)。

If there are no short issues, power up the system and check voltages as shown in Short and voltage check points using any test point for ground with the LED status shown in LED definitions on I/O board.
如果没有短路问题,则接通系统电源并检查电压, 如 使用任何接地测试点进行短路和电压检查 所示, LED状态如 I/O板上的LED定义 所示。

../_images/image24.png

Short and voltage check points


短路和电压检查点

Short and voltage check points using any test point for ground
使用任何接地测试点进行短路和电压检查

Ref Des

FormForm

Signal信号

Voltage电压

C123

Pad 2Pad 2

PWR_LCD_BL

15V +/- 2%

[14.7,15.3]


15V +/- 2%

[14.7,15.3]

C414

Pad 1Pad 1

PWR_5V

5.2V +/- 2%

[5.096,5.304]


5.2V +/- 2%

[5.096,5.304]

C6

Pad 1Pad 1

PWR_3V3

3.3V +/- 1%

[3.267,3.333]


3.3V +/- 1%

[3.267,3.333]

Q3

Pad 2Pad 2

PWR_1V8

1.8V +/- 2%

[1.764,1.836]


1.8V +/- 2%

[1.764,1.836]

C452

Pad 1Pad 1

PWR_VDDM_1V2

1.2V +/- 2%

[1.176,1.224]


1.2V +/- 2%

[1.176,1.224]

C441

Pad 1Pad 1

PWR_VDDM_2V5

2.5V +/- 2%

[2.45,2.55]


2.5V +/- 2%

[2.45,2.55]

R554

Pad 2Pad 2

PWR_VCORE_FB

Vcore_FB +/- 2%Vcore_FB +/—2%

References参考资料

The following documents are applicable to the SL1620 evaluation system:
以下文件适用于SL1620评估系统:

  • SL1620 Datasheet (PN: 505-001428-01)
    SL1620 Datasheet(PN:505-001428-01)